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target-arm: Implement VMULL.P8
Implement VMULL.P8 (the 32x32->64 version of the polynomial multiply instruction). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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@ -277,6 +277,7 @@ DEF_HELPER_2(neon_sub_u16, i32, i32, i32)
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DEF_HELPER_2(neon_mul_u8, i32, i32, i32)
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DEF_HELPER_2(neon_mul_u16, i32, i32, i32)
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DEF_HELPER_2(neon_mul_p8, i32, i32, i32)
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DEF_HELPER_2(neon_mull_p8, i64, i32, i32)
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DEF_HELPER_2(neon_tst_u8, i32, i32, i32)
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DEF_HELPER_2(neon_tst_u16, i32, i32, i32)
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@ -895,6 +895,36 @@ uint32_t HELPER(neon_mul_p8)(uint32_t op1, uint32_t op2)
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return result;
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}
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uint64_t HELPER(neon_mull_p8)(uint32_t op1, uint32_t op2)
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{
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uint64_t result = 0;
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uint64_t mask;
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uint64_t op2ex = op2;
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op2ex = (op2ex & 0xff) |
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((op2ex & 0xff00) << 8) |
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((op2ex & 0xff0000) << 16) |
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((op2ex & 0xff000000) << 24);
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while (op1) {
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mask = 0;
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if (op1 & 1) {
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mask |= 0xffff;
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}
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if (op1 & (1 << 8)) {
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mask |= (0xffffU << 16);
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}
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if (op1 & (1 << 16)) {
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mask |= (0xffffULL << 32);
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}
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if (op1 & (1 << 24)) {
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mask |= (0xffffULL << 48);
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}
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result ^= op2ex & mask;
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op1 = (op1 >> 1) & 0x7f7f7f7f;
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op2ex <<= 1;
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}
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return result;
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}
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#define NEON_FN(dest, src1, src2) dest = (src1 & src2) ? -1 : 0
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NEON_VOP(tst_u8, neon_u8, 4)
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NEON_VOP(tst_u16, neon_u16, 2)
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@ -5124,8 +5124,10 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
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gen_neon_mull(cpu_V0, tmp, tmp2, size, u);
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break;
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case 14: /* Polynomial VMULL */
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cpu_abort(env, "Polynomial VMULL not implemented");
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gen_helper_neon_mull_p8(cpu_V0, tmp, tmp2);
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dead_tmp(tmp2);
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dead_tmp(tmp);
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break;
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default: /* 15 is RESERVED. */
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return 1;
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}
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