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arm/xlnx-versal-virt: use memdev for RAM

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memory_region_allocate_system_memory() API is going away, so
replace it with memdev allocated MemoryRegion. The later is
initialized by generic code, so board only needs to opt in
to memdev scheme by providing
  MachineClass::default_ram_id
and using MachineState::ram instead of manually initializing
RAM memory region.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200219160953.13771-37-imammedo@redhat.com>
This commit is contained in:
Igor Mammedov 2020-02-19 11:09:10 -05:00 committed by Patchew Importer
parent 8182d3d1f1
commit e9201598f4
1 changed files with 2 additions and 5 deletions
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7
hw/arm/xlnx-versal-virt.c
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@ -30,7 +30,6 @@ typedef struct VersalVirt {
MachineState parent_obj; MachineState parent_obj;
Versal soc; Versal soc;
MemoryRegion mr_ddr;
void *fdt; void *fdt;
int fdt_size; int fdt_size;
@ -414,12 +413,9 @@ static void versal_virt_init(MachineState *machine)
psci_conduit = QEMU_PSCI_CONDUIT_SMC; psci_conduit = QEMU_PSCI_CONDUIT_SMC;
} }
memory_region_allocate_system_memory(&s->mr_ddr, NULL, "ddr",
machine->ram_size);
sysbus_init_child_obj(OBJECT(machine), "xlnx-ve", &s->soc, sysbus_init_child_obj(OBJECT(machine), "xlnx-ve", &s->soc,
sizeof(s->soc), TYPE_XLNX_VERSAL); sizeof(s->soc), TYPE_XLNX_VERSAL);
object_property_set_link(OBJECT(&s->soc), OBJECT(&s->mr_ddr), object_property_set_link(OBJECT(&s->soc), OBJECT(machine->ram),
"ddr", &error_abort); "ddr", &error_abort);
object_property_set_int(OBJECT(&s->soc), psci_conduit, object_property_set_int(OBJECT(&s->soc), psci_conduit,
"psci-conduit", &error_abort); "psci-conduit", &error_abort);
@ -473,6 +469,7 @@ static void versal_virt_machine_class_init(ObjectClass *oc, void *data)
mc->max_cpus = XLNX_VERSAL_NR_ACPUS; mc->max_cpus = XLNX_VERSAL_NR_ACPUS;
mc->default_cpus = XLNX_VERSAL_NR_ACPUS; mc->default_cpus = XLNX_VERSAL_NR_ACPUS;
mc->no_cdrom = true; mc->no_cdrom = true;
mc->default_ram_id = "ddr";
} }
static const TypeInfo versal_virt_machine_init_typeinfo = { static const TypeInfo versal_virt_machine_init_typeinfo = {