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ide: pass down DriveInfo instead of BlockDriverState

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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Gerd Hoffmann 2009-08-28 15:47:03 +02:00 committed by Anthony Liguori
parent ddd9bbd93b
commit f455e98cf4
19 changed files with 46 additions and 59 deletions
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12
hw/ide.h
View File

@ -5,23 +5,23 @@
/* ide-isa.c */
void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
BlockDriverState *hd0, BlockDriverState *hd1);
DriveInfo *hd0, DriveInfo *hd1);
/* ide-pci.c */
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table,
int secondary_ide_enabled);
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn,
qemu_irq *pic);
void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn,
qemu_irq *pic);
/* ide-macio.c */
int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq,
int pmac_ide_init (DriveInfo **hd_table, qemu_irq irq,
void *dbdma, int channel, qemu_irq dma_irq);
/* ide-mmio.c */
void mmio_ide_init (target_phys_addr_t membase, target_phys_addr_t membase2,
qemu_irq irq, int shift,
BlockDriverState *hd0, BlockDriverState *hd1);
DriveInfo *hd0, DriveInfo *hd1);
#endif /* HW_IDE_H */

7
hw/ide/core.c
View File

@ -2506,7 +2506,7 @@ void ide_reset(IDEState *s)
s->media_changed = 0;
}
void ide_init2(IDEBus *bus, BlockDriverState *hd0, BlockDriverState *hd1,
void ide_init2(IDEBus *bus, DriveInfo *hd0, DriveInfo *hd1,
qemu_irq irq)
{
IDEState *s;
@ -2518,7 +2518,10 @@ void ide_init2(IDEBus *bus, BlockDriverState *hd0, BlockDriverState *hd1,
s = bus->ifs + i;
s->bus = bus;
s->unit = i;
s->bs = (i == 0) ? hd0 : hd1;
if (i == 0 && hd0)
s->bs = hd0->bdrv;
if (i == 1 && hd1)
s->bs = hd1->bdrv;
s->io_buffer = qemu_blockalign(s->bs, IDE_DMA_BUF_SECTORS*512 + 4);
if (s->bs) {
bdrv_get_geometry(s->bs, &nb_sectors);

2
hw/ide/internal.h
View File

@ -528,7 +528,7 @@ uint32_t ide_data_readw(void *opaque, uint32_t addr);
void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);
uint32_t ide_data_readl(void *opaque, uint32_t addr);
void ide_init2(IDEBus *bus, BlockDriverState *hd0, BlockDriverState *hd1,
void ide_init2(IDEBus *bus, DriveInfo *hd0, DriveInfo *hd1,
qemu_irq irq);
void ide_init_ioport(IDEBus *bus, int iobase, int iobase2);

2
hw/ide/isa.c
View File

@ -58,7 +58,7 @@ static int isa_ide_load(QEMUFile* f, void *opaque, int version_id)
}
void isa_ide_init(int iobase, int iobase2, qemu_irq irq,
BlockDriverState *hd0, BlockDriverState *hd1)
DriveInfo *hd0, DriveInfo *hd1)
{
ISAIDEState *s;

2
hw/ide/macio.c
View File

@ -334,7 +334,7 @@ static void pmac_ide_reset(void *opaque)
/* hd_table must contain 4 block drivers */
/* PowerMac uses memory mapped registers, not I/O. Return the memory
I/O index to access the ide. */
int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq,
int pmac_ide_init (DriveInfo **hd_table, qemu_irq irq,
void *dbdma, int channel, qemu_irq dma_irq)
{
MACIOIDEState *d;

2
hw/ide/microdrive.c
View File

@ -555,7 +555,7 @@ static int dscm1xxxx_detach(void *opaque)
return 0;
}
PCMCIACardState *dscm1xxxx_init(BlockDriverState *bdrv)
PCMCIACardState *dscm1xxxx_init(DriveInfo *bdrv)
{
MicroDriveState *md = (MicroDriveState *) qemu_mallocz(sizeof(MicroDriveState));
md->card.state = md;

2
hw/ide/mmio.c
View File

@ -124,7 +124,7 @@ static int mmio_ide_load(QEMUFile* f, void *opaque, int version_id)
void mmio_ide_init (target_phys_addr_t membase, target_phys_addr_t membase2,
qemu_irq irq, int shift,
BlockDriverState *hd0, BlockDriverState *hd1)
DriveInfo *hd0, DriveInfo *hd1)
{
MMIOState *s = qemu_mallocz(sizeof(MMIOState));
IDEBus *bus = qemu_mallocz(sizeof(*bus));

11
hw/ide/pci.c
View File

@ -375,7 +375,7 @@ static void cmd646_reset(void *opaque)
}
/* CMD646 PCI IDE controller */
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
void pci_cmd646_ide_init(PCIBus *bus, DriveInfo **hd_table,
int secondary_ide_enabled)
{
PCIIDEState *d;
@ -443,12 +443,11 @@ static void piix3_reset(void *opaque)
/* hd_table must contain 4 block drivers */
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
void pci_piix3_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn,
qemu_irq *pic)
{
PCIIDEState *d;
uint8_t *pci_conf;
int i;
/* register a function 1 of PIIX3 */
d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
@ -475,16 +474,12 @@ void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
ide_init_ioport(&d->bus[0], 0x1f0, 0x3f6);
ide_init_ioport(&d->bus[1], 0x170, 0x376);
for (i = 0; i < 4; i++)
if (hd_table[i])
hd_table[i]->private = &d->dev;
register_savevm("ide", 0, 3, pci_ide_save, pci_ide_load, d);
}
/* hd_table must contain 4 block drivers */
/* NOTE: for the PIIX4, the IRQs and IOports are hardcoded */
void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
void pci_piix4_ide_init(PCIBus *bus, DriveInfo **hd_table, int devfn,
qemu_irq *pic)
{
PCIIDEState *d;

5
hw/mips_malta.c
View File

@ -775,7 +775,7 @@ void mips_malta_init (ram_addr_t ram_size,
i2c_bus *smbus;
int i;
DriveInfo *dinfo;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD];
int fl_idx = 0;
int fl_sectors = 0;
@ -899,8 +899,7 @@ void mips_malta_init (ram_addr_t ram_size,
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
dinfo = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
hd[i] = dinfo ? dinfo->bdrv : NULL;
hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
}
piix4_devfn = piix4_init(pci_bus, 80);

5
hw/mips_r4k.c
View File

@ -156,7 +156,7 @@ void mips_r4k_init (ram_addr_t ram_size,
RTCState *rtc_state;
int i;
qemu_irq *i8259;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *dinfo;
/* init CPUs */
@ -268,8 +268,7 @@ void mips_r4k_init (ram_addr_t ram_size,
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
dinfo = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
hd[i] = dinfo ? dinfo->bdrv : NULL;
hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
}
for(i = 0; i < MAX_IDE_BUS; i++)

15
hw/pc.c
View File

@ -264,7 +264,7 @@ static int pc_boot_set(void *opaque, const char *boot_device)
/* hd_table must contain 4 block drivers */
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
const char *boot_device, BlockDriverState **hd_table)
const char *boot_device, DriveInfo **hd_table)
{
RTCState *s = rtc_state;
int nbds, bds[3] = { 0, };
@ -355,9 +355,9 @@ static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
if (hd_table[0])
cmos_init_hd(0x19, 0x1b, hd_table[0]);
cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
if (hd_table[1])
cmos_init_hd(0x1a, 0x24, hd_table[1]);
cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
val = 0;
for (i = 0; i < 4; i++) {
@ -367,9 +367,9 @@ static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
geometry. It is always such that: 1 <= sects <= 63, 1
<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
geometry can be different if a translation is done. */
translation = bdrv_get_translation_hint(hd_table[i]);
translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
if (translation == BIOS_ATA_TRANSLATION_AUTO) {
bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
/* No translation. */
translation = 0;
@ -1131,7 +1131,7 @@ static void pc_init1(ram_addr_t ram_size,
qemu_irq *i8259;
IsaIrqState *isa_irq_state;
DriveInfo *dinfo;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD];
int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
void *fw_cfg;
@ -1359,8 +1359,7 @@ static void pc_init1(ram_addr_t ram_size,
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
dinfo = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
hd[i] = dinfo ? dinfo->bdrv : NULL;
hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
}
if (pci_enabled) {

3
hw/pcmcia.h
View File

@ -1,6 +1,7 @@
/* PCMCIA/Cardbus */
#include "qemu-common.h"
#include "sysemu.h"
typedef struct {
qemu_irq irq;
@ -48,4 +49,4 @@ struct PCMCIACardState {
#define CISTPL_ENDMARK 0xff
/* dscm1xxxx.c */
PCMCIACardState *dscm1xxxx_init(BlockDriverState *bdrv);
PCMCIACardState *dscm1xxxx_init(DriveInfo *bdrv);

6
hw/ppc_newworld.c
View File

@ -107,8 +107,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
qemu_irq *dummy_irq;
int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
int ppc_boot_device;
DriveInfo *dinfo;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
void *dbdma;
uint8_t *vga_bios_ptr;
@ -316,8 +315,7 @@ static void ppc_core99_init (ram_addr_t ram_size,
exit(1);
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
dinfo = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
hd[i] = dinfo ? dinfo->bdrv : NULL;
hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
}
dbdma = DBDMA_init(&dbdma_mem_index);
pci_cmd646_ide_init(pci_bus, hd, 0);

15
hw/ppc_oldworld.c
View File

@ -137,8 +137,7 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
int pic_mem_index, nvram_mem_index, dbdma_mem_index, cuda_mem_index;
int escc_mem_index, ide_mem_index[2];
uint16_t ppc_boot_device;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *dinfo;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
void *fw_cfg;
void *dbdma;
uint8_t *vga_bios_ptr;
@ -331,19 +330,15 @@ static void ppc_heathrow_init (ram_addr_t ram_size,
}
/* First IDE channel is a MAC IDE on the MacIO bus */
dinfo = drive_get(IF_IDE, 0, 0);
hd[0] = dinfo ? dinfo->bdrv : NULL;
dinfo = drive_get(IF_IDE, 0, 1);
hd[1] = dinfo ? dinfo->bdrv : NULL;
hd[0] = drive_get(IF_IDE, 0, 0);
hd[1] = drive_get(IF_IDE, 0, 1);
dbdma = DBDMA_init(&dbdma_mem_index);
ide_mem_index[0] = -1;
ide_mem_index[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
/* Second IDE channel is a CMD646 on the PCI bus */
dinfo = drive_get(IF_IDE, 1, 0);
hd[0] = dinfo ? dinfo->bdrv : NULL;
dinfo = drive_get(IF_IDE, 1, 1);
hd[1] = dinfo ? dinfo->bdrv : NULL;
hd[0] = drive_get(IF_IDE, 1, 0);
hd[1] = drive_get(IF_IDE, 1, 1);
hd[3] = hd[2] = NULL;
pci_cmd646_ide_init(pci_bus, hd, 0);

5
hw/ppc_prep.c
View File

@ -563,7 +563,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
qemu_irq *i8259;
int ppc_boot_device;
DriveInfo *dinfo;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD];
sysctrl = qemu_mallocz(sizeof(sysctrl_t));
@ -703,8 +703,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
dinfo = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
hd[i] = dinfo ? dinfo->bdrv : NULL;
hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
}
for(i = 0; i < MAX_IDE_BUS; i++) {

2
hw/r2d.c
View File

@ -231,7 +231,7 @@ static void r2d_init(ram_addr_t ram_size,
/* onboard CF (True IDE mode, Master only). */
if ((dinfo = drive_get(IF_IDE, 0, 0)) != NULL)
mmio_ide_init(0x14001000, 0x1400080c, irq[CF_IDE], 1,
dinfo->bdrv, NULL);
dinfo, NULL);
/* NIC: rtl8139 on-board, and 2 slots. */
for (i = 0; i < nb_nics; i++)

2
hw/spitz.c
View File

@ -754,7 +754,7 @@ static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
return;
bs = dinfo->bdrv;
if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
md = dscm1xxxx_init(bs);
md = dscm1xxxx_init(dinfo);
pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
}
}

5
hw/sun4u.c
View File

@ -566,7 +566,7 @@ static void sun4uv_init(ram_addr_t RAM_size,
long initrd_size, kernel_size;
PCIBus *pci_bus, *pci_bus2, *pci_bus3;
qemu_irq *irq;
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
BlockDriverState *fd[MAX_FD];
void *fw_cfg;
DriveInfo *dinfo;
@ -617,9 +617,8 @@ static void sun4uv_init(ram_addr_t RAM_size,
exit(1);
}
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
dinfo = drive_get(IF_IDE, i / MAX_IDE_DEVS,
hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS,
i % MAX_IDE_DEVS);
hd[i] = dinfo ? dinfo->bdrv : NULL;
}
pci_cmd646_ide_init(pci_bus, hd, 1);

2
hw/tosa.c
View File

@ -57,7 +57,7 @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
return;
bs = dinfo->bdrv;
if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
md = dscm1xxxx_init(bs);
md = dscm1xxxx_init(dinfo);
pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);
}
}