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tcg/ppc: Split out tcg_out_ext{8,16,32}s
We will shortly require these in other context; make the expansion as clear as possible. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -738,6 +738,21 @@ static inline void tcg_out_rlw(TCGContext *s, int op, TCGReg ra, TCGReg rs,
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tcg_out32(s, op | RA(ra) | RS(rs) | SH(sh) | MB(mb) | ME(me));
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}
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static inline void tcg_out_ext8s(TCGContext *s, TCGReg dst, TCGReg src)
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{
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tcg_out32(s, EXTSB | RA(dst) | RS(src));
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}
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static inline void tcg_out_ext16s(TCGContext *s, TCGReg dst, TCGReg src)
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{
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tcg_out32(s, EXTSH | RA(dst) | RS(src));
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}
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static inline void tcg_out_ext32s(TCGContext *s, TCGReg dst, TCGReg src)
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{
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tcg_out32(s, EXTSW | RA(dst) | RS(src));
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}
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static inline void tcg_out_ext32u(TCGContext *s, TCGReg dst, TCGReg src)
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{
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tcg_out_rld(s, RLDICL, dst, src, 0, 32);
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@ -2322,7 +2337,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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const int const_args[TCG_MAX_OP_ARGS])
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{
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TCGArg a0, a1, a2;
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int c;
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switch (opc) {
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case INDEX_op_exit_tb:
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@ -2390,7 +2404,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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case INDEX_op_ld8s_i32:
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case INDEX_op_ld8s_i64:
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tcg_out_mem_long(s, LBZ, LBZX, args[0], args[1], args[2]);
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tcg_out32(s, EXTSB | RS(args[0]) | RA(args[0]));
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tcg_out_ext8s(s, args[0], args[0]);
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break;
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case INDEX_op_ld16u_i32:
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case INDEX_op_ld16u_i64:
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@ -2728,18 +2742,15 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
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case INDEX_op_ext8s_i32:
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case INDEX_op_ext8s_i64:
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c = EXTSB;
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goto gen_ext;
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tcg_out_ext8s(s, args[0], args[1]);
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break;
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case INDEX_op_ext16s_i32:
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case INDEX_op_ext16s_i64:
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c = EXTSH;
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goto gen_ext;
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tcg_out_ext16s(s, args[0], args[1]);
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break;
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case INDEX_op_ext_i32_i64:
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case INDEX_op_ext32s_i64:
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c = EXTSW;
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goto gen_ext;
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gen_ext:
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tcg_out32(s, c | RS(args[1]) | RA(args[0]));
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tcg_out_ext32s(s, args[0], args[1]);
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break;
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case INDEX_op_extu_i32_i64:
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tcg_out_ext32u(s, args[0], args[1]);
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