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target/i386: Convert to disas_set_info hook
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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parent
3d7196d43b
commit
f50f3dd5d6
22
disas.c
22
disas.c
@ -204,16 +204,7 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,
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cc->disas_set_info(cpu, &s.info);
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}
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#if defined(TARGET_I386)
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if (flags == 2) {
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s.info.mach = bfd_mach_x86_64;
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} else if (flags == 1) {
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s.info.mach = bfd_mach_i386_i8086;
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} else {
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s.info.mach = bfd_mach_i386_i386;
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}
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s.info.print_insn = print_insn_i386;
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#elif defined(TARGET_PPC)
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#if defined(TARGET_PPC)
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if ((flags >> 16) & 1) {
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s.info.endian = BFD_ENDIAN_LITTLE;
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}
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@ -389,16 +380,7 @@ void monitor_disas(Monitor *mon, CPUState *cpu,
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cc->disas_set_info(cpu, &s.info);
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}
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#if defined(TARGET_I386)
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if (flags == 2) {
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s.info.mach = bfd_mach_x86_64;
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} else if (flags == 1) {
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s.info.mach = bfd_mach_i386_i8086;
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} else {
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s.info.mach = bfd_mach_i386_i386;
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}
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s.info.print_insn = print_insn_i386;
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#elif defined(TARGET_PPC)
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#if defined(TARGET_PPC)
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if (flags & 0xFFFF) {
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/* If we have a precise definition of the instruction set, use it. */
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s.info.mach = flags & 0xFFFF;
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21
monitor.c
21
monitor.c
@ -1310,27 +1310,6 @@ static void memory_dump(Monitor *mon, int count, int format, int wsize,
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if (format == 'i') {
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int flags = 0;
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#ifdef TARGET_I386
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CPUArchState *env = mon_get_cpu_env();
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if (wsize == 2) {
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flags = 1;
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} else if (wsize == 4) {
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flags = 0;
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} else {
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/* as default we use the current CS size */
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flags = 0;
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if (env) {
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#ifdef TARGET_X86_64
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if ((env->efer & MSR_EFER_LMA) &&
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(env->segs[R_CS].flags & DESC_L_MASK))
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flags = 2;
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else
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#endif
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if (!(env->segs[R_CS].flags & DESC_B_MASK))
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flags = 1;
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}
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}
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#endif
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#ifdef TARGET_PPC
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CPUArchState *env = mon_get_cpu_env();
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flags = msr_le << 16;
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@ -4097,6 +4097,17 @@ static bool x86_cpu_has_work(CPUState *cs)
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!(env->hflags & HF_SMM_MASK));
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}
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static void x86_disas_set_info(CPUState *cs, disassemble_info *info)
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{
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X86CPU *cpu = X86_CPU(cs);
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CPUX86State *env = &cpu->env;
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info->mach = (env->hflags & HF_CS64_MASK ? bfd_mach_x86_64
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: env->hflags & HF_CS32_MASK ? bfd_mach_i386_i386
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: bfd_mach_i386_i8086);
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info->print_insn = print_insn_i386;
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}
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static Property x86_cpu_properties[] = {
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#ifdef CONFIG_USER_ONLY
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/* apic_id = 0 by default for *-user, see commit 9886e834 */
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@ -4216,6 +4227,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
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#endif
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cc->cpu_exec_enter = x86_cpu_exec_enter;
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cc->cpu_exec_exit = x86_cpu_exec_exit;
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cc->disas_set_info = x86_disas_set_info;
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dc->user_creatable = true;
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}
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@ -8557,15 +8557,9 @@ static void i386_tr_disas_log(const DisasContextBase *dcbase,
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CPUState *cpu)
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{
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DisasContext *dc = container_of(dcbase, DisasContext, base);
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int disas_flags = !dc->code32;
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qemu_log("IN: %s\n", lookup_symbol(dc->base.pc_first));
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#ifdef TARGET_X86_64
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if (dc->code64) {
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disas_flags = 2;
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}
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#endif
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log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size, disas_flags);
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log_target_disas(cpu, dc->base.pc_first, dc->base.tb->size, 0);
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}
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static const TranslatorOps i386_tr_ops = {
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