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target/arm: Update SCR_EL3 bits to ARMv8.8

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Update SCR_EL3 fields per ARM DDI0487 H.a.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-04-17 10:43:29 -07:00 committed by Peter Maydell
parent c42fb26b13
commit f527d66183
1 changed files with 12 additions and 0 deletions
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12
target/arm/cpu.h
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@ -1545,6 +1545,18 @@ static inline void xpsr_write(CPUARMState *env, uint32_t val, uint32_t mask)
#define SCR_FIEN (1U << 21) #define SCR_FIEN (1U << 21)
#define SCR_ENSCXT (1U << 25) #define SCR_ENSCXT (1U << 25)
#define SCR_ATA (1U << 26) #define SCR_ATA (1U << 26)
#define SCR_FGTEN (1U << 27)
#define SCR_ECVEN (1U << 28)
#define SCR_TWEDEN (1U << 29)
#define SCR_TWEDEL MAKE_64BIT_MASK(30, 4)
#define SCR_TME (1ULL << 34)
#define SCR_AMVOFFEN (1ULL << 35)
#define SCR_ENAS0 (1ULL << 36)
#define SCR_ADEN (1ULL << 37)
#define SCR_HXEN (1ULL << 38)
#define SCR_TRNDR (1ULL << 40)
#define SCR_ENTP2 (1ULL << 41)
#define SCR_GPF (1ULL << 48)
#define HSTR_TTEE (1 << 16) #define HSTR_TTEE (1 << 16)
#define HSTR_TJDBX (1 << 17) #define HSTR_TJDBX (1 << 17)