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target/ppc: remove unused interrupts from p8_next_unmasked_interrupt
Remove the following unused interrupts from the POWER8 interrupt masking method: - PPC_INTERRUPT_RESET: only raised for 6xx, 7xx, 970, and POWER5p; - Debug Interrupt: removed in Power ISA v2.07; - Hypervisor Virtualization: introduced in Power ISA v3.0; - Critical Input, Watchdog Timer, and Fixed Interval Timer: only defined for embedded CPUs; - Critical Doorbell: processor does not implement the "Embedded.Processor Control" category; - Programmable Interval Timer: 40x-only; - PPC_INTERRUPT_THERM: only raised for 970 and POWER5p; Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20221011204829.1641124-14-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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@ -1685,14 +1685,17 @@ void ppc_cpu_do_interrupt(CPUState *cs)
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#if defined(TARGET_PPC64)
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#if defined(TARGET_PPC64)
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#define P8_UNUSED_INTERRUPTS \
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(PPC_INTERRUPT_RESET | PPC_INTERRUPT_DEBUG | PPC_INTERRUPT_HVIRT | \
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PPC_INTERRUPT_CEXT | PPC_INTERRUPT_WDT | PPC_INTERRUPT_CDOORBELL | \
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PPC_INTERRUPT_FIT | PPC_INTERRUPT_PIT | PPC_INTERRUPT_THERM)
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static int p8_next_unmasked_interrupt(CPUPPCState *env)
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static int p8_next_unmasked_interrupt(CPUPPCState *env)
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{
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{
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bool async_deliver;
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bool async_deliver;
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/* External reset */
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assert((env->pending_interrupts & P8_UNUSED_INTERRUPTS) == 0);
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if (env->pending_interrupts & PPC_INTERRUPT_RESET) {
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return PPC_INTERRUPT_RESET;
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}
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/* Machine check exception */
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/* Machine check exception */
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if (env->pending_interrupts & PPC_INTERRUPT_MCK) {
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if (env->pending_interrupts & PPC_INTERRUPT_MCK) {
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return PPC_INTERRUPT_MCK;
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return PPC_INTERRUPT_MCK;
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@ -1716,15 +1719,6 @@ static int p8_next_unmasked_interrupt(CPUPPCState *env)
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}
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}
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}
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}
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/* Hypervisor virtualization interrupt */
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if (env->pending_interrupts & PPC_INTERRUPT_HVIRT) {
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/* LPCR will be clear when not supported so this will work */
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bool hvice = !!(env->spr[SPR_LPCR] & LPCR_HVICE);
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if ((async_deliver || !FIELD_EX64_HV(env->msr)) && hvice) {
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return PPC_INTERRUPT_HVIRT;
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}
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}
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/* External interrupt can ignore MSR:EE under some circumstances */
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/* External interrupt can ignore MSR:EE under some circumstances */
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if (env->pending_interrupts & PPC_INTERRUPT_EXT) {
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if (env->pending_interrupts & PPC_INTERRUPT_EXT) {
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bool lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);
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bool lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);
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@ -1736,28 +1730,7 @@ static int p8_next_unmasked_interrupt(CPUPPCState *env)
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return PPC_INTERRUPT_EXT;
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return PPC_INTERRUPT_EXT;
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}
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}
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}
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}
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if (FIELD_EX64(env->msr, MSR, CE)) {
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/* External critical interrupt */
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if (env->pending_interrupts & PPC_INTERRUPT_CEXT) {
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return PPC_INTERRUPT_CEXT;
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}
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}
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if (async_deliver != 0) {
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if (async_deliver != 0) {
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/* Watchdog timer on embedded PowerPC */
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if (env->pending_interrupts & PPC_INTERRUPT_WDT) {
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return PPC_INTERRUPT_WDT;
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}
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if (env->pending_interrupts & PPC_INTERRUPT_CDOORBELL) {
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return PPC_INTERRUPT_CDOORBELL;
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}
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/* Fixed interval timer on embedded PowerPC */
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if (env->pending_interrupts & PPC_INTERRUPT_FIT) {
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return PPC_INTERRUPT_FIT;
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}
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/* Programmable interval timer on embedded PowerPC */
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if (env->pending_interrupts & PPC_INTERRUPT_PIT) {
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return PPC_INTERRUPT_PIT;
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}
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/* Decrementer exception */
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/* Decrementer exception */
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if (env->pending_interrupts & PPC_INTERRUPT_DECR) {
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if (env->pending_interrupts & PPC_INTERRUPT_DECR) {
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return PPC_INTERRUPT_DECR;
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return PPC_INTERRUPT_DECR;
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@ -1771,10 +1744,6 @@ static int p8_next_unmasked_interrupt(CPUPPCState *env)
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if (env->pending_interrupts & PPC_INTERRUPT_PERFM) {
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if (env->pending_interrupts & PPC_INTERRUPT_PERFM) {
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return PPC_INTERRUPT_PERFM;
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return PPC_INTERRUPT_PERFM;
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}
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}
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/* Thermal interrupt */
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if (env->pending_interrupts & PPC_INTERRUPT_THERM) {
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return PPC_INTERRUPT_THERM;
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}
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/* EBB exception */
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/* EBB exception */
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if (env->pending_interrupts & PPC_INTERRUPT_EBB) {
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if (env->pending_interrupts & PPC_INTERRUPT_EBB) {
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/*
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/*
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