mirror of
https://github.com/xemu-project/xemu.git
synced 2025-02-21 04:45:25 +00:00
target/riscv: Allow setting CPU feature from machine/device emulation
The machine or device emulation should be able to force set certain CPU features because: 1) We can have certain CPU features which are in-general optional but implemented by RISC-V CPUs on the machine. 2) We can have devices which require a certain CPU feature. For example, AIA IMSIC devices expect AIA CSRs implemented by RISC-V CPUs. Signed-off-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Anup Patel <anup@brainfault.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-id: 20220204174700.534953-6-anup@brainfault.org Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
parent
02d9565b92
commit
f87adf23fa
@ -135,11 +135,6 @@ static void set_vext_version(CPURISCVState *env, int vext_ver)
|
|||||||
env->vext_ver = vext_ver;
|
env->vext_ver = vext_ver;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void set_feature(CPURISCVState *env, int feature)
|
|
||||||
{
|
|
||||||
env->features |= (1ULL << feature);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void set_resetvec(CPURISCVState *env, target_ulong resetvec)
|
static void set_resetvec(CPURISCVState *env, target_ulong resetvec)
|
||||||
{
|
{
|
||||||
#ifndef CONFIG_USER_ONLY
|
#ifndef CONFIG_USER_ONLY
|
||||||
@ -508,18 +503,18 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp)
|
|||||||
}
|
}
|
||||||
|
|
||||||
if (cpu->cfg.mmu) {
|
if (cpu->cfg.mmu) {
|
||||||
set_feature(env, RISCV_FEATURE_MMU);
|
riscv_set_feature(env, RISCV_FEATURE_MMU);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cpu->cfg.pmp) {
|
if (cpu->cfg.pmp) {
|
||||||
set_feature(env, RISCV_FEATURE_PMP);
|
riscv_set_feature(env, RISCV_FEATURE_PMP);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Enhanced PMP should only be available
|
* Enhanced PMP should only be available
|
||||||
* on harts with PMP support
|
* on harts with PMP support
|
||||||
*/
|
*/
|
||||||
if (cpu->cfg.epmp) {
|
if (cpu->cfg.epmp) {
|
||||||
set_feature(env, RISCV_FEATURE_EPMP);
|
riscv_set_feature(env, RISCV_FEATURE_EPMP);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -379,6 +379,11 @@ static inline bool riscv_feature(CPURISCVState *env, int feature)
|
|||||||
return env->features & (1ULL << feature);
|
return env->features & (1ULL << feature);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static inline void riscv_set_feature(CPURISCVState *env, int feature)
|
||||||
|
{
|
||||||
|
env->features |= (1ULL << feature);
|
||||||
|
}
|
||||||
|
|
||||||
#include "cpu_user.h"
|
#include "cpu_user.h"
|
||||||
|
|
||||||
extern const char * const riscv_int_regnames[];
|
extern const char * const riscv_int_regnames[];
|
||||||
|
Loading…
x
Reference in New Issue
Block a user