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sam460ex: Fix timer frequency and clock multipliers
We only emulate timer running at CPU frequency which is what most guests expect so set the frequency to match real hardware. This also allows setting clock multipliers which caused slowdown previously due to wrong timer frequency. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -392,8 +392,7 @@ static uint32_t dcr_read_sdr(void *opaque, int dcrn)
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case SDR0_CFGDATA:
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switch (sdr->addr) {
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case SDR0_STRP0:
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/* FIXME: Is this correct? This breaks timing in U-Boot */
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ret = 0; /*(0xb5 << 8) | (1 << 4) | 9 */
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ret = (0xb5 << 8) | (1 << 4) | 9;
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break;
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case SDR0_STRP1:
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ret = (5 << 29) | (2 << 26) | (1 << 24);
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@ -67,6 +67,7 @@
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IRQ12 = SM502_INT
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*/
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#define CPU_FREQ 1150000000
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#define SDRAM_NR_BANKS 4
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/* FIXME: See u-boot.git 8ac41e, also fix in ppc440_uc.c */
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@ -253,8 +254,8 @@ static int sam460ex_load_device_tree(hwaddr addr,
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char *filename;
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int fdt_size;
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void *fdt;
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uint32_t tb_freq = 50000000;
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uint32_t clock_freq = 50000000;
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uint32_t tb_freq = CPU_FREQ;
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uint32_t clock_freq = CPU_FREQ;
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
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if (!filename) {
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@ -416,7 +417,7 @@ static void sam460ex_init(MachineState *machine)
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boot_info = g_malloc0(sizeof(*boot_info));
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env->load_info = boot_info;
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ppc_booke_timers_init(cpu, 50000000, 0);
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ppc_booke_timers_init(cpu, CPU_FREQ, 0);
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ppc_dcr_init(env, NULL, NULL);
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/* PLB arbitrer */
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