From fb50cfe44dbff7be1489c5ecf5428aabd401f2e0 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 11 Aug 2011 16:07:14 -0700 Subject: [PATCH] serial: Use enum device_endian in serial_mm_init parameter The use of DEVICE_NATIVE_ENDIAN cleans up lots of ifdefs in many of the callers. Signed-off-by: Richard Henderson Signed-off-by: Avi Kivity --- hw/mips_jazz.c | 14 ++++---------- hw/mips_malta.c | 7 ++----- hw/musicpal.c | 14 ++------------ hw/omap_uart.c | 17 ++--------------- hw/pc.h | 2 +- hw/petalogix_ml605_mmu.c | 2 +- hw/ppc405_uc.c | 8 ++++---- hw/ppc440.c | 4 ++-- hw/ppce500_mpc8544ds.c | 4 ++-- hw/pxa2xx.c | 33 +++++++++++++-------------------- hw/serial.c | 4 +--- hw/sm501.c | 8 +------- hw/sun4u.c | 2 +- hw/virtex_ml507.c | 3 ++- 14 files changed, 38 insertions(+), 84 deletions(-) diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c index ea07d32ead..9a87a8ea39 100644 --- a/hw/mips_jazz.c +++ b/hw/mips_jazz.c @@ -264,18 +264,12 @@ static void mips_jazz_init(MemoryRegion *address_space, /* Serial ports */ if (serial_hds[0]) { -#ifdef TARGET_WORDS_BIGENDIAN - serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 1); -#else - serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 0); -#endif + serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], + 1, DEVICE_NATIVE_ENDIAN); } if (serial_hds[1]) { -#ifdef TARGET_WORDS_BIGENDIAN - serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 1); -#else - serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 0); -#endif + serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], + 1, DEVICE_NATIVE_ENDIAN); } /* Parallel port */ diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 1ec1228b87..0b16914422 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -446,11 +446,8 @@ static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space, s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init); -#ifdef TARGET_WORDS_BIGENDIAN - s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1, 1); -#else - s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1, 0); -#endif + s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, + 1, DEVICE_NATIVE_ENDIAN); malta_fpga_reset(s); qemu_register_reset(malta_fpga_reset, s); diff --git a/hw/musicpal.c b/hw/musicpal.c index 9b1f38062b..e79b07e856 100644 --- a/hw/musicpal.c +++ b/hw/musicpal.c @@ -1486,22 +1486,12 @@ static void musicpal_init(ram_addr_t ram_size, pic[MP_TIMER4_IRQ], NULL); if (serial_hds[0]) { -#ifdef TARGET_WORDS_BIGENDIAN serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000, - serial_hds[0], 1, 1); -#else - serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000, - serial_hds[0], 1, 0); -#endif + serial_hds[0], 1, DEVICE_NATIVE_ENDIAN); } if (serial_hds[1]) { -#ifdef TARGET_WORDS_BIGENDIAN serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000, - serial_hds[1], 1, 1); -#else - serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000, - serial_hds[1], 1, 0); -#endif + serial_hds[1], 1, DEVICE_NATIVE_ENDIAN); } /* Register flash */ diff --git a/hw/omap_uart.c b/hw/omap_uart.c index 191a0c2ccd..66696ab865 100644 --- a/hw/omap_uart.c +++ b/hw/omap_uart.c @@ -60,15 +60,9 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base, s->base = base; s->fclk = fclk; s->irq = irq; -#ifdef TARGET_WORDS_BIGENDIAN s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16, chr ?: qemu_chr_new(label, "null", NULL), 1, - 1); -#else - s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16, - chr ?: qemu_chr_new(label, "null", NULL), 1, - 0); -#endif + DEVICE_NATIVE_ENDIAN); return s; } @@ -182,15 +176,8 @@ struct omap_uart_s *omap2_uart_init(struct omap_target_agent_s *ta, void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr) { /* TODO: Should reuse or destroy current s->serial */ -#ifdef TARGET_WORDS_BIGENDIAN s->serial = serial_mm_init(s->base, 2, s->irq, omap_clk_getrate(s->fclk) / 16, chr ?: qemu_chr_new("null", "null", NULL), 1, - 1); -#else - s->serial = serial_mm_init(s->base, 2, s->irq, - omap_clk_getrate(s->fclk) / 16, - chr ?: qemu_chr_new("null", "null", NULL), 1, - 0); -#endif + DEVICE_NATIVE_ENDIAN); } diff --git a/hw/pc.h b/hw/pc.h index 7e6ddbab82..d70b81a9ca 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -18,7 +18,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase, SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, qemu_irq irq, int baudbase, CharDriverState *chr, int ioregister, - int be); + enum device_endian); static inline bool serial_isa_init(int index, CharDriverState *chr) { ISADevice *dev; diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c index 38db521b37..97ff33d61b 100644 --- a/hw/petalogix_ml605_mmu.c +++ b/hw/petalogix_ml605_mmu.c @@ -185,7 +185,7 @@ petalogix_ml605_init(ram_addr_t ram_size, } serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200, - serial_hds[0], 1, 0); + serial_hds[0], 1, DEVICE_LITTLE_ENDIAN); /* 2 timers at irq 2 @ 100 Mhz. */ xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000); diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c index 9d5d2af5d8..35584df992 100644 --- a/hw/ppc405_uc.c +++ b/hw/ppc405_uc.c @@ -2150,11 +2150,11 @@ CPUState *ppc405cr_init (MemoryRegion ram_memories[4], /* Serial ports */ if (serial_hds[0] != NULL) { serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE, - serial_hds[0], 1, 1); + serial_hds[0], 1, DEVICE_BIG_ENDIAN); } if (serial_hds[1] != NULL) { serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE, - serial_hds[1], 1, 1); + serial_hds[1], 1, DEVICE_BIG_ENDIAN); } /* IIC controller */ ppc405_i2c_init(0xef600500, pic[2]); @@ -2505,11 +2505,11 @@ CPUState *ppc405ep_init (MemoryRegion ram_memories[2], /* Serial ports */ if (serial_hds[0] != NULL) { serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE, - serial_hds[0], 1, 1); + serial_hds[0], 1, DEVICE_BIG_ENDIAN); } if (serial_hds[1] != NULL) { serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE, - serial_hds[1], 1, 1); + serial_hds[1], 1, DEVICE_BIG_ENDIAN); } /* OCM */ ppc405_ocm_init(env); diff --git a/hw/ppc440.c b/hw/ppc440.c index 5885ff057c..9dd9215201 100644 --- a/hw/ppc440.c +++ b/hw/ppc440.c @@ -93,11 +93,11 @@ CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip, if (serial_hds[0] != NULL) { serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE, - serial_hds[0], 1, 1); + serial_hds[0], 1, DEVICE_BIG_ENDIAN); } if (serial_hds[1] != NULL) { serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE, - serial_hds[1], 1, 1); + serial_hds[1], 1, DEVICE_BIG_ENDIAN); } return env; diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c index 1274a3e1eb..c3583f9d88 100644 --- a/hw/ppce500_mpc8544ds.c +++ b/hw/ppce500_mpc8544ds.c @@ -276,13 +276,13 @@ static void mpc8544ds_init(ram_addr_t ram_size, if (serial_hds[0]) { serial_mm_init(MPC8544_SERIAL0_REGS_BASE, 0, mpic[12+26], 399193, - serial_hds[0], 1, 1); + serial_hds[0], 1, DEVICE_BIG_ENDIAN); } if (serial_hds[1]) { serial_mm_init(MPC8544_SERIAL1_REGS_BASE, 0, mpic[12+26], 399193, - serial_hds[0], 1, 1); + serial_hds[0], 1, DEVICE_BIG_ENDIAN); } /* General Utility device */ diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c index 2aa876001e..55b5d8ccb4 100644 --- a/hw/pxa2xx.c +++ b/hw/pxa2xx.c @@ -2113,19 +2113,16 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision) qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI), qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI)); - for (i = 0; pxa270_serial[i].io_base; i ++) - if (serial_hds[i]) -#ifdef TARGET_WORDS_BIGENDIAN + for (i = 0; pxa270_serial[i].io_base; i++) { + if (serial_hds[i]) { serial_mm_init(pxa270_serial[i].io_base, 2, - qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn), - 14857000 / 16, serial_hds[i], 1, 1); -#else - serial_mm_init(pxa270_serial[i].io_base, 2, - qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn), - 14857000 / 16, serial_hds[i], 1, 0); -#endif - else + qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn), + 14857000 / 16, serial_hds[i], 1, + DEVICE_NATIVE_ENDIAN); + } else { break; + } + } if (serial_hds[i]) s->fir = pxa2xx_fir_init(0x40800000, qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP), @@ -2248,20 +2245,16 @@ PXA2xxState *pxa255_init(unsigned int sdram_size) qdev_get_gpio_in(s->dma, PXA2XX_RX_RQ_MMCI), qdev_get_gpio_in(s->dma, PXA2XX_TX_RQ_MMCI)); - for (i = 0; pxa255_serial[i].io_base; i ++) + for (i = 0; pxa255_serial[i].io_base; i++) { if (serial_hds[i]) { -#ifdef TARGET_WORDS_BIGENDIAN serial_mm_init(pxa255_serial[i].io_base, 2, - qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn), - 14745600 / 16, serial_hds[i], 1, 1); -#else - serial_mm_init(pxa255_serial[i].io_base, 2, - qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn), - 14745600 / 16, serial_hds[i], 1, 0); -#endif + qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn), + 14745600 / 16, serial_hds[i], 1, + DEVICE_NATIVE_ENDIAN); } else { break; } + } if (serial_hds[i]) s->fir = pxa2xx_fir_init(0x40800000, qdev_get_gpio_in(s->pic, PXA2XX_PIC_ICP), diff --git a/hw/serial.c b/hw/serial.c index 310bfde6f8..a533c04dc9 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -858,10 +858,9 @@ static const MemoryRegionOps serial_mm_ops[3] = { SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, qemu_irq irq, int baudbase, CharDriverState *chr, int ioregister, - int be) + enum device_endian end) { SerialState *s; - enum device_endian end; s = g_malloc0(sizeof(SerialState)); @@ -873,7 +872,6 @@ SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, serial_init_core(s); vmstate_register(NULL, base, &vmstate_serial, s); - end = (be ? DEVICE_BIG_ENDIAN : DEVICE_LITTLE_ENDIAN); memory_region_init_io(&s->io, &serial_mm_ops[end], s, "serial", 8 << it_shift); if (ioregister) { diff --git a/hw/sm501.c b/hw/sm501.c index 1ed0a7e309..26e2dfe807 100644 --- a/hw/sm501.c +++ b/hw/sm501.c @@ -1440,15 +1440,9 @@ void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq, /* bridge to serial emulation module */ if (chr) { -#ifdef TARGET_WORDS_BIGENDIAN serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2, NULL, /* TODO : chain irq to IRL */ - 115200, chr, 1, 1); -#else - serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2, - NULL, /* TODO : chain irq to IRL */ - 115200, chr, 1, 0); -#endif + 115200, chr, 1, DEVICE_NATIVE_ENDIAN); } /* create qemu graphic console */ diff --git a/hw/sun4u.c b/hw/sun4u.c index fbef350a44..b6d81710fe 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -771,7 +771,7 @@ static void sun4uv_init(ram_addr_t RAM_size, i = 0; if (hwdef->console_serial_base) { serial_mm_init(hwdef->console_serial_base, 0, NULL, 115200, - serial_hds[i], 1, 1); + serial_hds[i], 1, DEVICE_BIG_ENDIAN); i++; } for(; i < MAX_SERIAL_PORTS; i++) { diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c index 7459b0bbe9..a4721e38be 100644 --- a/hw/virtex_ml507.c +++ b/hw/virtex_ml507.c @@ -226,7 +226,8 @@ static void virtex_init(ram_addr_t ram_size, irq[i] = qdev_get_gpio_in(dev, i); } - serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0], 1, 0); + serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0], + 1, DEVICE_LITTLE_ENDIAN); /* 2 timers at irq 2 @ 62 Mhz. */ xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);