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tcg-s390: Move ldst helpers out of line
That is, the old LDST_OPTIMIZATION. Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
Richard Henderson
parent
f24efee41e
commit
fb5964152d
@ -24,7 +24,7 @@
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* THE SOFTWARE.
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*/
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#include "tcg-be-null.h"
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#include "tcg-be-ldst.h"
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/* We only support generating code for 64-bit mode. */
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#if TCG_TARGET_REG_BITS != 64
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@ -1386,107 +1386,123 @@ static void tcg_out_qemu_st_direct(TCGContext *s, TCGMemOp opc, TCGReg data,
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}
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#if defined(CONFIG_SOFTMMU)
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static TCGReg tcg_prepare_qemu_ldst(TCGContext* s, TCGReg data_reg,
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TCGReg addr_reg, int mem_index, int opc,
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tcg_insn_unit **label2_ptr_p, int is_store)
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/* We're expecting to use a 20-bit signed offset on the tlb memory ops.
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Using the offset of the second entry in the last tlb table ensures
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that we can index all of the elements of the first entry. */
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QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table[NB_MMU_MODES - 1][1])
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> 0x7ffff);
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/* Load and compare a TLB entry, leaving the flags set. Loads the TLB
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addend into R2. Returns a register with the santitized guest address. */
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static TCGReg tcg_out_tlb_read(TCGContext* s, TCGReg addr_reg, TCGMemOp opc,
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int mem_index, bool is_ld)
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{
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const TCGReg arg0 = tcg_target_call_iarg_regs[0];
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const TCGReg arg1 = tcg_target_call_iarg_regs[1];
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const TCGReg arg2 = tcg_target_call_iarg_regs[2];
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const TCGReg arg3 = tcg_target_call_iarg_regs[3];
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const TCGReg arg4 = tcg_target_call_iarg_regs[4];
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TCGMemOp s_bits = opc & MO_SIZE;
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tcg_insn_unit *label1_ptr;
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tcg_target_long ofs;
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int ofs;
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if (TARGET_LONG_BITS == 32) {
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tgen_ext32u(s, arg1, addr_reg);
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} else {
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tcg_out_mov(s, TCG_TYPE_I64, arg1, addr_reg);
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}
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tcg_out_sh64(s, RSY_SRLG, arg2, addr_reg, TCG_REG_NONE,
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tcg_out_sh64(s, RSY_SRLG, TCG_REG_R2, addr_reg, TCG_REG_NONE,
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TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
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tgen_andi(s, TCG_TYPE_I64, arg1, TARGET_PAGE_MASK | ((1 << s_bits) - 1));
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tgen_andi(s, TCG_TYPE_I64, arg2, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
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if (is_store) {
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ofs = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write);
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if (TARGET_LONG_BITS == 32) {
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tgen_ext32u(s, TCG_REG_R3, addr_reg);
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} else {
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tcg_out_mov(s, TCG_TYPE_I64, TCG_REG_R3, addr_reg);
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}
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tgen_andi(s, TCG_TYPE_I64, TCG_REG_R2,
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(CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
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tgen_andi(s, TCG_TYPE_I64, TCG_REG_R3,
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TARGET_PAGE_MASK | ((1 << s_bits) - 1));
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if (is_ld) {
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ofs = offsetof(CPUArchState, tlb_table[mem_index][0].addr_read);
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} else {
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ofs = offsetof(CPUArchState, tlb_table[mem_index][0].addr_write);
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}
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assert(ofs < 0x80000);
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if (TARGET_LONG_BITS == 32) {
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tcg_out_mem(s, RX_C, RXY_CY, arg1, arg2, TCG_AREG0, ofs);
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tcg_out_mem(s, RX_C, RXY_CY, TCG_REG_R3, TCG_REG_R2, TCG_AREG0, ofs);
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} else {
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tcg_out_mem(s, 0, RXY_CG, arg1, arg2, TCG_AREG0, ofs);
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tcg_out_mem(s, 0, RXY_CG, TCG_REG_R3, TCG_REG_R2, TCG_AREG0, ofs);
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}
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if (TARGET_LONG_BITS == 32) {
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tgen_ext32u(s, arg1, addr_reg);
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} else {
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tcg_out_mov(s, TCG_TYPE_I64, arg1, addr_reg);
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}
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label1_ptr = s->code_ptr;
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/* je label1 (offset will be patched in later) */
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tcg_out_insn(s, RI, BRC, S390_CC_EQ, 0);
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/* call load/store helper */
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if (is_store) {
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/* Make sure to zero-extend the value to the full register
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for the calling convention. */
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switch (s_bits) {
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case MO_UB:
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tgen_ext8u(s, TCG_TYPE_I64, arg2, data_reg);
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break;
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case MO_UW:
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tgen_ext16u(s, TCG_TYPE_I64, arg2, data_reg);
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break;
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case MO_UL:
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tgen_ext32u(s, arg2, data_reg);
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break;
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case MO_Q:
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tcg_out_mov(s, TCG_TYPE_I64, arg2, data_reg);
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break;
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default:
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tcg_abort();
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}
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tcg_out_movi(s, TCG_TYPE_I32, arg3, mem_index);
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tcg_out_mov(s, TCG_TYPE_PTR, arg0, TCG_AREG0);
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tcg_out_movi(s, TCG_TYPE_PTR, arg4, (uintptr_t)s->code_ptr);
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tcg_out_call(s, qemu_st_helpers[opc]);
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} else {
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tcg_out_movi(s, TCG_TYPE_I32, arg2, mem_index);
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tcg_out_mov(s, TCG_TYPE_PTR, arg0, TCG_AREG0);
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tcg_out_movi(s, TCG_TYPE_PTR, arg3, (uintptr_t)s->code_ptr);
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tcg_out_call(s, qemu_ld_helpers[opc]);
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tcg_out_mov(s, TCG_TYPE_I64, data_reg, TCG_REG_R2);
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}
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/* jump to label2 (end) */
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*label2_ptr_p = s->code_ptr;
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tcg_out_insn(s, RI, BRC, S390_CC_ALWAYS, 0);
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/* this is label1, patch branch */
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label1_ptr[1] = s->code_ptr - label1_ptr;
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ofs = offsetof(CPUArchState, tlb_table[mem_index][0].addend);
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assert(ofs < 0x80000);
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tcg_out_mem(s, 0, RXY_LG, TCG_REG_R2, TCG_REG_R2, TCG_AREG0, ofs);
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tcg_out_mem(s, 0, RXY_AG, arg1, arg2, TCG_AREG0, ofs);
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return arg1;
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if (TARGET_LONG_BITS == 32) {
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tgen_ext32u(s, TCG_REG_R3, addr_reg);
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return TCG_REG_R3;
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}
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return addr_reg;
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}
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static void tcg_finish_qemu_ldst(TCGContext* s, tcg_insn_unit *label2_ptr)
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static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGMemOp opc,
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TCGReg data, TCGReg addr, int mem_index,
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tcg_insn_unit *raddr, tcg_insn_unit *label_ptr)
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{
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/* patch branch */
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label2_ptr[1] = s->code_ptr - label2_ptr;
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TCGLabelQemuLdst *label = new_ldst_label(s);
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label->is_ld = is_ld;
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label->opc = opc;
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label->datalo_reg = data;
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label->addrlo_reg = addr;
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label->mem_index = mem_index;
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label->raddr = raddr;
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label->label_ptr[0] = label_ptr;
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}
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static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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{
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TCGReg addr_reg = lb->addrlo_reg;
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TCGReg data_reg = lb->datalo_reg;
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TCGMemOp opc = lb->opc;
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patch_reloc(lb->label_ptr[0], R_390_PC16DBL, (intptr_t)s->code_ptr, -2);
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_AREG0);
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if (TARGET_LONG_BITS == 64) {
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tcg_out_mov(s, TCG_TYPE_I64, TCG_REG_R3, addr_reg);
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}
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tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_R4, lb->mem_index);
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R5, (uintptr_t)lb->raddr);
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tcg_out_call(s, qemu_ld_helpers[opc]);
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tcg_out_mov(s, TCG_TYPE_I64, data_reg, TCG_REG_R2);
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tgen_gotoi(s, S390_CC_ALWAYS, lb->raddr);
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}
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static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
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{
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TCGReg addr_reg = lb->addrlo_reg;
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TCGReg data_reg = lb->datalo_reg;
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TCGMemOp opc = lb->opc;
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patch_reloc(lb->label_ptr[0], R_390_PC16DBL, (intptr_t)s->code_ptr, -2);
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tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_R2, TCG_AREG0);
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if (TARGET_LONG_BITS == 64) {
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tcg_out_mov(s, TCG_TYPE_I64, TCG_REG_R3, addr_reg);
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}
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switch (opc & MO_SIZE) {
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case MO_UB:
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tgen_ext8u(s, TCG_TYPE_I64, TCG_REG_R4, data_reg);
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break;
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case MO_UW:
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tgen_ext16u(s, TCG_TYPE_I64, TCG_REG_R4, data_reg);
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break;
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case MO_UL:
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tgen_ext32u(s, TCG_REG_R4, data_reg);
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break;
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case MO_Q:
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tcg_out_mov(s, TCG_TYPE_I64, TCG_REG_R4, data_reg);
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break;
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default:
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tcg_abort();
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}
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tcg_out_movi(s, TCG_TYPE_I32, TCG_REG_R5, lb->mem_index);
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tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_R6, (uintptr_t)lb->raddr);
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tcg_out_call(s, qemu_st_helpers[opc]);
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tgen_gotoi(s, S390_CC_ALWAYS, lb->raddr);
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}
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#else
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static void tcg_prepare_user_ldst(TCGContext *s, TCGReg *addr_reg,
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@ -1506,18 +1522,22 @@ static void tcg_prepare_user_ldst(TCGContext *s, TCGReg *addr_reg,
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}
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#endif /* CONFIG_SOFTMMU */
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/* load data with address translation (if applicable)
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and endianness conversion */
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static void tcg_out_qemu_ld(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
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TCGMemOp opc, int mem_index)
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{
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#if defined(CONFIG_SOFTMMU)
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tcg_insn_unit *label2_ptr;
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#ifdef CONFIG_SOFTMMU
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tcg_insn_unit *label_ptr;
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TCGReg base_reg;
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addr_reg = tcg_prepare_qemu_ldst(s, data_reg, addr_reg, mem_index,
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opc, &label2_ptr, 0);
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tcg_out_qemu_ld_direct(s, opc, data_reg, addr_reg, TCG_REG_NONE, 0);
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tcg_finish_qemu_ldst(s, label2_ptr);
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base_reg = tcg_out_tlb_read(s, addr_reg, opc, mem_index, 1);
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label_ptr = s->code_ptr + 1;
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tcg_out_insn(s, RI, BRC, S390_CC_NE, 0);
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tcg_out_qemu_ld_direct(s, opc, data_reg, base_reg, TCG_REG_R2, 0);
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add_qemu_ldst_label(s, 1, opc, data_reg, addr_reg, mem_index,
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s->code_ptr, label_ptr);
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#else
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TCGReg index_reg;
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tcg_target_long disp;
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@ -1530,13 +1550,19 @@ static void tcg_out_qemu_ld(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
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static void tcg_out_qemu_st(TCGContext* s, TCGReg data_reg, TCGReg addr_reg,
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TCGMemOp opc, int mem_index)
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{
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#if defined(CONFIG_SOFTMMU)
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tcg_insn_unit *label2_ptr;
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#ifdef CONFIG_SOFTMMU
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tcg_insn_unit *label_ptr;
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TCGReg base_reg;
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addr_reg = tcg_prepare_qemu_ldst(s, data_reg, addr_reg, mem_index,
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opc, &label2_ptr, 1);
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tcg_out_qemu_st_direct(s, opc, data_reg, addr_reg, TCG_REG_NONE, 0);
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tcg_finish_qemu_ldst(s, label2_ptr);
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base_reg = tcg_out_tlb_read(s, addr_reg, opc, mem_index, 0);
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label_ptr = s->code_ptr + 1;
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tcg_out_insn(s, RI, BRC, S390_CC_NE, 0);
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tcg_out_qemu_st_direct(s, opc, data_reg, base_reg, TCG_REG_R2, 0);
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add_qemu_ldst_label(s, 0, opc, data_reg, addr_reg, mem_index,
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s->code_ptr, label_ptr);
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#else
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TCGReg index_reg;
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tcg_target_long disp;
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