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ich9: add smm_enabled field and arguments
Q35's ACPI device is hard-coding SMM availability to KVM. Place the logic where the board is created instead, so that it will be possible to override it. Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -192,7 +192,7 @@ static void pm_reset(void *opaque)
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acpi_pm_tmr_reset(&pm->acpi_regs);
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acpi_gpe_reset(&pm->acpi_regs);
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if (kvm_enabled()) {
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if (!pm->smm_enabled) {
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/* Mark SMM as already inited to prevent SMM from running. KVM does not
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* support SMM mode. */
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pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
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@ -209,7 +209,7 @@ static void pm_powerdown_req(Notifier *n, void *opaque)
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acpi_pm1_evt_power_down(&pm->acpi_regs);
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}
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void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
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void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, bool smm_enabled,
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qemu_irq sci_irq)
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{
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memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
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@ -231,6 +231,7 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
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"acpi-smi", 8);
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memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
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pm->smm_enabled = smm_enabled;
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pm->irq = sci_irq;
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qemu_register_reset(pm_reset, pm);
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pm->powerdown_notifier.notify = pm_powerdown_req;
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@ -253,7 +253,7 @@ static void pc_q35_init(MachineState *machine)
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(pc_machine->vmport != ON_OFF_AUTO_ON), 0xff0104);
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/* connect pm stuff to lpc */
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ich9_lpc_pm_init(lpc);
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ich9_lpc_pm_init(lpc, !kvm_enabled());
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/* ahci and SATA device, for q35 1 ahci controller is built-in */
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ahci = pci_create_simple_multifunction(host_bus,
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@ -357,11 +357,13 @@ static void ich9_set_sci(void *opaque, int irq_num, int level)
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}
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}
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void ich9_lpc_pm_init(PCIDevice *lpc_pci)
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void ich9_lpc_pm_init(PCIDevice *lpc_pci, bool smm_enabled)
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{
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ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pci);
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qemu_irq sci_irq;
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ich9_pm_init(lpc_pci, &lpc->pm, qemu_allocate_irq(ich9_set_sci, lpc, 0));
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sci_irq = qemu_allocate_irq(ich9_set_sci, lpc, 0);
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ich9_pm_init(lpc_pci, &lpc->pm, smm_enabled, sci_irq);
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ich9_lpc_reset(&lpc->d.qdev);
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}
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@ -54,10 +54,11 @@ typedef struct ICH9LPCPMRegs {
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uint8_t disable_s3;
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uint8_t disable_s4;
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uint8_t s4_val;
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uint8_t smm_enabled;
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} ICH9LPCPMRegs;
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void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
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qemu_irq sci_irq);
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bool smm_enabled, qemu_irq sci_irq);
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void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base);
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extern const VMStateDescription vmstate_ich9_pm;
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@ -17,7 +17,7 @@
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void ich9_lpc_set_irq(void *opaque, int irq_num, int level);
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int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx);
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PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin);
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void ich9_lpc_pm_init(PCIDevice *pci_lpc);
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void ich9_lpc_pm_init(PCIDevice *pci_lpc, bool smm_enabled);
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I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
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#define ICH9_CC_SIZE (16 * 1024) /* 16KB */
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