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hw/pci-host/gpex-acpi: Add support for dsdt construction for pxb-cxl
This adds code to instantiate the slightly extended ACPI root port description in DSDT as per the CXL 2.0 specification. Basically a cut and paste job from the i386/pc code. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220429144110.25167-30-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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@ -29,6 +29,7 @@ config ARM_VIRT
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select ACPI_APEI
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select ACPI_VIOT
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select VIRTIO_MEM_SUPPORTED
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select ACPI_CXL
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config CHEETAH
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bool
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@ -5,6 +5,7 @@
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#include "hw/pci/pci_bus.h"
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#include "hw/pci/pci_bridge.h"
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#include "hw/pci/pcie_host.h"
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#include "hw/acpi/cxl.h"
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static void acpi_dsdt_add_pci_route_table(Aml *dev, uint32_t irq)
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{
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@ -139,6 +140,7 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
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QLIST_FOREACH(bus, &bus->child, sibling) {
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uint8_t bus_num = pci_bus_num(bus);
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uint8_t numa_node = pci_bus_numa_node(bus);
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bool is_cxl = pci_bus_is_cxl(bus);
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if (!pci_bus_is_root(bus)) {
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continue;
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@ -154,8 +156,16 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
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}
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dev = aml_device("PC%.02X", bus_num);
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aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A08")));
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aml_append(dev, aml_name_decl("_CID", aml_string("PNP0A03")));
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if (is_cxl) {
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struct Aml *pkg = aml_package(2);
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aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0016")));
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aml_append(pkg, aml_eisaid("PNP0A08"));
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aml_append(pkg, aml_eisaid("PNP0A03"));
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aml_append(dev, aml_name_decl("_CID", pkg));
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} else {
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aml_append(dev, aml_name_decl("_HID", aml_string("PNP0A08")));
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aml_append(dev, aml_name_decl("_CID", aml_string("PNP0A03")));
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}
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aml_append(dev, aml_name_decl("_BBN", aml_int(bus_num)));
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aml_append(dev, aml_name_decl("_UID", aml_int(bus_num)));
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aml_append(dev, aml_name_decl("_STR", aml_unicode("pxb Device")));
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@ -175,7 +185,11 @@ void acpi_dsdt_add_gpex(Aml *scope, struct GPEXConfig *cfg)
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cfg->pio.base, 0, 0, 0);
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aml_append(dev, aml_name_decl("_CRS", crs));
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acpi_dsdt_add_pci_osc(dev);
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if (is_cxl) {
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build_cxl_osc_method(dev);
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} else {
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acpi_dsdt_add_pci_osc(dev);
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}
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aml_append(scope, dev);
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}
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