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target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32

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These operations do not touch fp_status.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200513163245.17915-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2020-05-13 09:32:40 -07:00 committed by Peter Maydell
parent c7715b6b51
commit fe6fb4beb2
4 changed files with 8 additions and 18 deletions
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4
target/arm/helper.h
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@ -211,8 +211,8 @@ DEF_HELPER_FLAGS_2(recpe_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f16, TCG_CALL_NO_RWG, f16, f16, ptr) DEF_HELPER_FLAGS_2(rsqrte_f16, TCG_CALL_NO_RWG, f16, f16, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr) DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr) DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr)
DEF_HELPER_2(recpe_u32, i32, i32, ptr) DEF_HELPER_FLAGS_1(recpe_u32, TCG_CALL_NO_RWG, i32, i32)
DEF_HELPER_FLAGS_2(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32, ptr) DEF_HELPER_FLAGS_1(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32)
DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32) DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32)
DEF_HELPER_3(shl_cc, i32, env, i32, i32) DEF_HELPER_3(shl_cc, i32, env, i32, i32)

5
target/arm/translate-a64.c
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@ -9699,7 +9699,7 @@ static void handle_2misc_reciprocal(DisasContext *s, int opcode,
switch (opcode) { switch (opcode) {
case 0x3c: /* URECPE */ case 0x3c: /* URECPE */
gen_helper_recpe_u32(tcg_res, tcg_op, fpst); gen_helper_recpe_u32(tcg_res, tcg_op);
break; break;
case 0x3d: /* FRECPE */ case 0x3d: /* FRECPE */
gen_helper_recpe_f32(tcg_res, tcg_op, fpst); gen_helper_recpe_f32(tcg_res, tcg_op, fpst);
@ -12244,7 +12244,6 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
unallocated_encoding(s); unallocated_encoding(s);
return; return;
} }
need_fpstatus = true;
break; break;
case 0x1e: /* FRINT32Z */ case 0x1e: /* FRINT32Z */
case 0x1f: /* FRINT64Z */ case 0x1f: /* FRINT64Z */
@ -12412,7 +12411,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
gen_helper_rints_exact(tcg_res, tcg_op, tcg_fpstatus); gen_helper_rints_exact(tcg_res, tcg_op, tcg_fpstatus);
break; break;
case 0x7c: /* URSQRTE */ case 0x7c: /* URSQRTE */
gen_helper_rsqrte_u32(tcg_res, tcg_op, tcg_fpstatus); gen_helper_rsqrte_u32(tcg_res, tcg_op);
break; break;
case 0x1e: /* FRINT32Z */ case 0x1e: /* FRINT32Z */
case 0x5e: /* FRINT32X */ case 0x5e: /* FRINT32X */

12
target/arm/translate.c
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@ -6875,19 +6875,11 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
break; break;
} }
case NEON_2RM_VRECPE: case NEON_2RM_VRECPE:
{ gen_helper_recpe_u32(tmp, tmp);
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
gen_helper_recpe_u32(tmp, tmp, fpstatus);
tcg_temp_free_ptr(fpstatus);
break; break;
}
case NEON_2RM_VRSQRTE: case NEON_2RM_VRSQRTE:
{ gen_helper_rsqrte_u32(tmp, tmp);
TCGv_ptr fpstatus = get_fpstatus_ptr(1);
gen_helper_rsqrte_u32(tmp, tmp, fpstatus);
tcg_temp_free_ptr(fpstatus);
break; break;
}
case NEON_2RM_VRECPE_F: case NEON_2RM_VRECPE_F:
{ {
TCGv_ptr fpstatus = get_fpstatus_ptr(1); TCGv_ptr fpstatus = get_fpstatus_ptr(1);

5
target/arm/vfp_helper.c
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@ -1023,9 +1023,8 @@ float64 HELPER(rsqrte_f64)(float64 input, void *fpstp)
return make_float64(val); return make_float64(val);
} }
uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp) uint32_t HELPER(recpe_u32)(uint32_t a)
{ {
/* float_status *s = fpstp; */
int input, estimate; int input, estimate;
if ((a & 0x80000000) == 0) { if ((a & 0x80000000) == 0) {
@ -1038,7 +1037,7 @@ uint32_t HELPER(recpe_u32)(uint32_t a, void *fpstp)
return deposit32(0, (32 - 9), 9, estimate); return deposit32(0, (32 - 9), 9, estimate);
} }
uint32_t HELPER(rsqrte_u32)(uint32_t a, void *fpstp) uint32_t HELPER(rsqrte_u32)(uint32_t a)
{ {
int estimate; int estimate;