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tcg: Introduce tcg_op_buf_count and tcg_op_buf_full
The method by which we count the number of ops emitted is going to change. Abstract that away into some inlines. Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Richard Henderson <rth@twiddle.net>
This commit is contained in:
parent
0a7df5da98
commit
fe700adb3d
@ -2790,7 +2790,6 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
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target_ulong pc_start;
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target_ulong pc_mask;
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uint32_t insn;
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uint16_t *gen_opc_end;
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CPUBreakpoint *bp;
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int j, lj = -1;
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ExitStatus ret;
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@ -2798,7 +2797,6 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
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int max_insns;
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pc_start = tb->pc;
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gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
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ctx.tb = tb;
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ctx.pc = pc_start;
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@ -2839,11 +2837,12 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
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}
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}
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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if (lj < j) {
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lj++;
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while (lj < j)
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while (lj < j) {
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tcg_ctx.gen_opc_instr_start[lj++] = 0;
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}
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}
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tcg_ctx.gen_opc_pc[lj] = ctx.pc;
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tcg_ctx.gen_opc_instr_start[lj] = 1;
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@ -2881,7 +2880,7 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
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or exhaust instruction count, stop generation. */
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if (ret == NO_EXIT
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&& ((ctx.pc & pc_mask) == 0
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|| tcg_ctx.gen_opc_ptr >= gen_opc_end
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|| tcg_op_buf_full()
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|| num_insns >= max_insns
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|| singlestep
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|| ctx.singlestep_enabled)) {
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@ -2914,10 +2913,11 @@ static inline void gen_intermediate_code_internal(AlphaCPU *cpu,
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gen_tb_end(tb, num_insns);
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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lj++;
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while (lj <= j)
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while (lj <= j) {
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tcg_ctx.gen_opc_instr_start[lj++] = 0;
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}
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} else {
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tb->size = ctx.pc - pc_start;
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tb->icount = num_insns;
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@ -10916,7 +10916,6 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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CPUARMState *env = &cpu->env;
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DisasContext dc1, *dc = &dc1;
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CPUBreakpoint *bp;
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uint16_t *gen_opc_end;
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int j, lj;
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target_ulong pc_start;
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target_ulong next_page_start;
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@ -10927,8 +10926,6 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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dc->tb = tb;
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gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
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dc->is_jmp = DISAS_NEXT;
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dc->pc = pc_start;
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dc->singlestep_enabled = cs->singlestep_enabled;
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@ -10998,7 +10995,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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}
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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if (lj < j) {
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lj++;
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while (lj < j) {
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@ -11048,7 +11045,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
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* ensures prefetch aborts occur at the right place.
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*/
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num_insns++;
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} while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end &&
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} while (!dc->is_jmp && !tcg_op_buf_full() &&
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!cs->singlestep_enabled &&
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!singlestep &&
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!dc->ss_active &&
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@ -11119,7 +11116,7 @@ done_generating:
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}
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#endif
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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lj++;
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while (lj <= j) {
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tcg_ctx.gen_opc_instr_start[lj++] = 0;
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@ -11025,7 +11025,6 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
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CPUARMState *env = &cpu->env;
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DisasContext dc1, *dc = &dc1;
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CPUBreakpoint *bp;
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uint16_t *gen_opc_end;
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int j, lj;
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target_ulong pc_start;
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target_ulong next_page_start;
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@ -11046,8 +11045,6 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
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dc->tb = tb;
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gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
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dc->is_jmp = DISAS_NEXT;
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dc->pc = pc_start;
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dc->singlestep_enabled = cs->singlestep_enabled;
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@ -11182,7 +11179,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
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}
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}
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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if (lj < j) {
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lj++;
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while (lj < j)
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@ -11248,7 +11245,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
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* Also stop translation when a page boundary is reached. This
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* ensures prefetch aborts occur at the right place. */
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num_insns ++;
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} while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end &&
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} while (!dc->is_jmp && !tcg_op_buf_full() &&
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!cs->singlestep_enabled &&
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!singlestep &&
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!dc->ss_active &&
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@ -11368,7 +11365,7 @@ done_generating:
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}
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#endif
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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lj++;
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while (lj <= j)
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tcg_ctx.gen_opc_instr_start[lj++] = 0;
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@ -3116,7 +3116,6 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
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{
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CPUState *cs = CPU(cpu);
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CPUCRISState *env = &cpu->env;
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uint16_t *gen_opc_end;
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uint32_t pc_start;
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unsigned int insn_len;
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int j, lj;
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@ -3142,8 +3141,6 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
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dc->cpu = cpu;
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dc->tb = tb;
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gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
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dc->is_jmp = DISAS_NEXT;
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dc->ppc = pc_start;
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dc->pc = pc_start;
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@ -3207,7 +3204,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
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check_breakpoint(env, dc);
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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if (lj < j) {
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lj++;
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while (lj < j) {
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@ -3291,7 +3288,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
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break;
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}
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} while (!dc->is_jmp && !dc->cpustate_changed
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&& tcg_ctx.gen_opc_ptr < gen_opc_end
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&& !tcg_op_buf_full()
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&& !singlestep
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&& (dc->pc < next_page_start)
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&& num_insns < max_insns);
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@ -3346,7 +3343,7 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
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gen_tb_end(tb, num_insns);
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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lj++;
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while (lj <= j) {
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tcg_ctx.gen_opc_instr_start[lj++] = 0;
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@ -3361,8 +3358,8 @@ gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
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log_target_disas(env, pc_start, dc->pc - pc_start,
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env->pregs[PR_VR]);
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qemu_log("\nisize=%d osize=%td\n",
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dc->pc - pc_start, tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf);
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qemu_log("\nisize=%d osize=%d\n",
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dc->pc - pc_start, tcg_op_buf_count());
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}
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#endif
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#endif
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@ -7913,7 +7913,6 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
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CPUX86State *env = &cpu->env;
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DisasContext dc1, *dc = &dc1;
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target_ulong pc_ptr;
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uint16_t *gen_opc_end;
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CPUBreakpoint *bp;
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int j, lj;
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uint64_t flags;
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@ -7993,8 +7992,6 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
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cpu_ptr1 = tcg_temp_new_ptr();
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cpu_cc_srcT = tcg_temp_local_new();
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gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
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dc->is_jmp = DISAS_NEXT;
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pc_ptr = pc_start;
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lj = -1;
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@ -8015,7 +8012,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
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}
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}
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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if (lj < j) {
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lj++;
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while (lj < j)
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@ -8060,7 +8057,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu,
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break;
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}
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/* if too long translation, stop generation too */
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if (tcg_ctx.gen_opc_ptr >= gen_opc_end ||
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if (tcg_op_buf_full() ||
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(pc_ptr - pc_start) >= (TARGET_PAGE_SIZE - 32) ||
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num_insns >= max_insns) {
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gen_jmp_im(pc_ptr - dc->cs_base);
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@ -8080,7 +8077,7 @@ done_generating:
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/* we don't forget to fill the last values */
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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lj++;
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while (lj <= j)
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tcg_ctx.gen_opc_instr_start[lj++] = 0;
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@ -1062,7 +1062,6 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
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CPUState *cs = CPU(cpu);
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CPULM32State *env = &cpu->env;
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struct DisasContext ctx, *dc = &ctx;
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uint16_t *gen_opc_end;
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uint32_t pc_start;
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int j, lj;
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uint32_t next_page_start;
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@ -1075,8 +1074,6 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
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dc->num_watchpoints = cpu->num_watchpoints;
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dc->tb = tb;
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gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
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dc->is_jmp = DISAS_NEXT;
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dc->pc = pc_start;
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dc->singlestep_enabled = cs->singlestep_enabled;
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@ -1100,7 +1097,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
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check_breakpoint(env, dc);
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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if (lj < j) {
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lj++;
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while (lj < j) {
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@ -1124,7 +1121,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
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num_insns++;
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} while (!dc->is_jmp
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&& tcg_ctx.gen_opc_ptr < gen_opc_end
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&& !tcg_op_buf_full()
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&& !cs->singlestep_enabled
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&& !singlestep
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&& (dc->pc < next_page_start)
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@ -1160,7 +1157,7 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
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gen_tb_end(tb, num_insns);
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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lj++;
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while (lj <= j) {
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tcg_ctx.gen_opc_instr_start[lj++] = 0;
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@ -1174,9 +1171,8 @@ void gen_intermediate_code_internal(LM32CPU *cpu,
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if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
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qemu_log("\n");
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log_target_disas(env, pc_start, dc->pc - pc_start, 0);
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qemu_log("\nisize=%d osize=%td\n",
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dc->pc - pc_start, tcg_ctx.gen_opc_ptr -
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tcg_ctx.gen_opc_buf);
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qemu_log("\nisize=%d osize=%d\n",
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dc->pc - pc_start, tcg_op_buf_count());
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}
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#endif
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}
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@ -2980,7 +2980,6 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
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CPUState *cs = CPU(cpu);
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CPUM68KState *env = &cpu->env;
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DisasContext dc1, *dc = &dc1;
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uint16_t *gen_opc_end;
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CPUBreakpoint *bp;
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int j, lj;
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target_ulong pc_start;
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@ -2993,8 +2992,6 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
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dc->tb = tb;
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gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
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dc->env = env;
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dc->is_jmp = DISAS_NEXT;
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dc->pc = pc_start;
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@ -3026,7 +3023,7 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
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break;
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}
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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if (lj < j) {
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lj++;
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while (lj < j)
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@ -3041,7 +3038,7 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
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dc->insn_pc = dc->pc;
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disas_m68k_insn(env, dc);
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num_insns++;
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} while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end &&
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} while (!dc->is_jmp && !tcg_op_buf_full() &&
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!cs->singlestep_enabled &&
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!singlestep &&
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(pc_offset) < (TARGET_PAGE_SIZE - 32) &&
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@ -3085,7 +3082,7 @@ gen_intermediate_code_internal(M68kCPU *cpu, TranslationBlock *tb,
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}
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#endif
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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lj++;
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while (lj <= j)
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tcg_ctx.gen_opc_instr_start[lj++] = 0;
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@ -1673,7 +1673,6 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
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{
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CPUState *cs = CPU(cpu);
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CPUMBState *env = &cpu->env;
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uint16_t *gen_opc_end;
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uint32_t pc_start;
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int j, lj;
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struct DisasContext ctx;
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@ -1688,8 +1687,6 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
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dc->tb = tb;
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org_flags = dc->synced_flags = dc->tb_flags = tb->flags;
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gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
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dc->is_jmp = DISAS_NEXT;
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dc->jmp = 0;
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dc->delayed_branch = !!(dc->tb_flags & D_FLAG);
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@ -1732,7 +1729,7 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
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check_breakpoint(env, dc);
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
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if (lj < j) {
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lj++;
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while (lj < j)
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@ -1795,10 +1792,10 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
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break;
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}
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} while (!dc->is_jmp && !dc->cpustate_changed
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&& tcg_ctx.gen_opc_ptr < gen_opc_end
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&& !singlestep
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&& (dc->pc < next_page_start)
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&& num_insns < max_insns);
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&& !tcg_op_buf_full()
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&& !singlestep
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&& (dc->pc < next_page_start)
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&& num_insns < max_insns);
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npc = dc->pc;
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if (dc->jmp == JMP_DIRECT || dc->jmp == JMP_DIRECT_CC) {
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@ -1848,7 +1845,7 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
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gen_tb_end(tb, num_insns);
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if (search_pc) {
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j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
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j = tcg_op_buf_count();
|
||||
lj++;
|
||||
while (lj <= j)
|
||||
tcg_ctx.gen_opc_instr_start[lj++] = 0;
|
||||
@ -1864,9 +1861,8 @@ gen_intermediate_code_internal(MicroBlazeCPU *cpu, TranslationBlock *tb,
|
||||
#if DISAS_GNU
|
||||
log_target_disas(env, pc_start, dc->pc - pc_start, 0);
|
||||
#endif
|
||||
qemu_log("\nisize=%d osize=%td\n",
|
||||
dc->pc - pc_start, tcg_ctx.gen_opc_ptr -
|
||||
tcg_ctx.gen_opc_buf);
|
||||
qemu_log("\nisize=%d osize=%d\n",
|
||||
dc->pc - pc_start, tcg_op_buf_count());
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
@ -19095,7 +19095,6 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
|
||||
CPUMIPSState *env = &cpu->env;
|
||||
DisasContext ctx;
|
||||
target_ulong pc_start;
|
||||
uint16_t *gen_opc_end;
|
||||
CPUBreakpoint *bp;
|
||||
int j, lj = -1;
|
||||
int num_insns;
|
||||
@ -19107,7 +19106,6 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
|
||||
qemu_log("search pc %d\n", search_pc);
|
||||
|
||||
pc_start = tb->pc;
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
ctx.pc = pc_start;
|
||||
ctx.saved_pc = -1;
|
||||
ctx.singlestep_enabled = cs->singlestep_enabled;
|
||||
@ -19151,7 +19149,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
|
||||
}
|
||||
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
if (lj < j) {
|
||||
lj++;
|
||||
while (lj < j)
|
||||
@ -19209,7 +19207,7 @@ gen_intermediate_code_internal(MIPSCPU *cpu, TranslationBlock *tb,
|
||||
if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) == 0)
|
||||
break;
|
||||
|
||||
if (tcg_ctx.gen_opc_ptr >= gen_opc_end) {
|
||||
if (tcg_op_buf_full()) {
|
||||
break;
|
||||
}
|
||||
|
||||
@ -19246,7 +19244,7 @@ done_generating:
|
||||
gen_tb_end(tb, num_insns);
|
||||
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
lj++;
|
||||
while (lj <= j)
|
||||
tcg_ctx.gen_opc_instr_start[lj++] = 0;
|
||||
|
@ -827,14 +827,12 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb,
|
||||
CPUState *cs = CPU(cpu);
|
||||
DisasContext ctx;
|
||||
target_ulong pc_start;
|
||||
uint16_t *gen_opc_end;
|
||||
CPUBreakpoint *bp;
|
||||
int j, lj = -1;
|
||||
CPUMoxieState *env = &cpu->env;
|
||||
int num_insns;
|
||||
|
||||
pc_start = tb->pc;
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
ctx.pc = pc_start;
|
||||
ctx.saved_pc = -1;
|
||||
ctx.tb = tb;
|
||||
@ -857,7 +855,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb,
|
||||
}
|
||||
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
if (lj < j) {
|
||||
lj++;
|
||||
while (lj < j) {
|
||||
@ -879,7 +877,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb,
|
||||
if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) == 0) {
|
||||
break;
|
||||
}
|
||||
} while (ctx.bstate == BS_NONE && tcg_ctx.gen_opc_ptr < gen_opc_end);
|
||||
} while (ctx.bstate == BS_NONE && !tcg_op_buf_full());
|
||||
|
||||
if (cs->singlestep_enabled) {
|
||||
tcg_gen_movi_tl(cpu_pc, ctx.pc);
|
||||
@ -902,7 +900,7 @@ gen_intermediate_code_internal(MoxieCPU *cpu, TranslationBlock *tb,
|
||||
gen_tb_end(tb, num_insns);
|
||||
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
lj++;
|
||||
while (lj <= j) {
|
||||
tcg_ctx.gen_opc_instr_start[lj++] = 0;
|
||||
|
@ -1642,7 +1642,6 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
|
||||
{
|
||||
CPUState *cs = CPU(cpu);
|
||||
struct DisasContext ctx, *dc = &ctx;
|
||||
uint16_t *gen_opc_end;
|
||||
uint32_t pc_start;
|
||||
int j, k;
|
||||
uint32_t next_page_start;
|
||||
@ -1652,7 +1651,6 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
|
||||
pc_start = tb->pc;
|
||||
dc->tb = tb;
|
||||
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
dc->is_jmp = DISAS_NEXT;
|
||||
dc->ppc = pc_start;
|
||||
dc->pc = pc_start;
|
||||
@ -1680,7 +1678,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
|
||||
do {
|
||||
check_breakpoint(cpu, dc);
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
if (k < j) {
|
||||
k++;
|
||||
while (k < j) {
|
||||
@ -1721,7 +1719,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
|
||||
}
|
||||
}
|
||||
} while (!dc->is_jmp
|
||||
&& tcg_ctx.gen_opc_ptr < gen_opc_end
|
||||
&& !tcg_op_buf_full()
|
||||
&& !cs->singlestep_enabled
|
||||
&& !singlestep
|
||||
&& (dc->pc < next_page_start)
|
||||
@ -1761,7 +1759,7 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
|
||||
gen_tb_end(tb, num_insns);
|
||||
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
k++;
|
||||
while (k <= j) {
|
||||
tcg_ctx.gen_opc_instr_start[k++] = 0;
|
||||
@ -1775,9 +1773,8 @@ static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu,
|
||||
if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
|
||||
qemu_log("\n");
|
||||
log_target_disas(&cpu->env, pc_start, dc->pc - pc_start, 0);
|
||||
qemu_log("\nisize=%d osize=%td\n",
|
||||
dc->pc - pc_start, tcg_ctx.gen_opc_ptr -
|
||||
tcg_ctx.gen_opc_buf);
|
||||
qemu_log("\nisize=%d osize=%d\n",
|
||||
dc->pc - pc_start, tcg_op_buf_count());
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
@ -11415,14 +11415,12 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
|
||||
DisasContext ctx, *ctxp = &ctx;
|
||||
opc_handler_t **table, *handler;
|
||||
target_ulong pc_start;
|
||||
uint16_t *gen_opc_end;
|
||||
CPUBreakpoint *bp;
|
||||
int j, lj = -1;
|
||||
int num_insns;
|
||||
int max_insns;
|
||||
|
||||
pc_start = tb->pc;
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
ctx.nip = pc_start;
|
||||
ctx.tb = tb;
|
||||
ctx.exception = POWERPC_EXCP_NONE;
|
||||
@ -11481,8 +11479,7 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
|
||||
gen_tb_start(tb);
|
||||
tcg_clear_temp_count();
|
||||
/* Set env in case of segfault during code fetch */
|
||||
while (ctx.exception == POWERPC_EXCP_NONE
|
||||
&& tcg_ctx.gen_opc_ptr < gen_opc_end) {
|
||||
while (ctx.exception == POWERPC_EXCP_NONE && !tcg_op_buf_full()) {
|
||||
if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
|
||||
QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
|
||||
if (bp->pc == ctx.nip) {
|
||||
@ -11492,7 +11489,7 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
|
||||
}
|
||||
}
|
||||
if (unlikely(search_pc)) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
if (lj < j) {
|
||||
lj++;
|
||||
while (lj < j)
|
||||
@ -11600,7 +11597,7 @@ static inline void gen_intermediate_code_internal(PowerPCCPU *cpu,
|
||||
gen_tb_end(tb, num_insns);
|
||||
|
||||
if (unlikely(search_pc)) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
lj++;
|
||||
while (lj <= j)
|
||||
tcg_ctx.gen_opc_instr_start[lj++] = 0;
|
||||
|
@ -4832,7 +4832,6 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu,
|
||||
DisasContext dc;
|
||||
target_ulong pc_start;
|
||||
uint64_t next_page_start;
|
||||
uint16_t *gen_opc_end;
|
||||
int j, lj = -1;
|
||||
int num_insns, max_insns;
|
||||
CPUBreakpoint *bp;
|
||||
@ -4851,8 +4850,6 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu,
|
||||
dc.cc_op = CC_OP_DYNAMIC;
|
||||
do_debug = dc.singlestep_enabled = cs->singlestep_enabled;
|
||||
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
|
||||
next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
|
||||
|
||||
num_insns = 0;
|
||||
@ -4865,7 +4862,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu,
|
||||
|
||||
do {
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
if (lj < j) {
|
||||
lj++;
|
||||
while (lj < j) {
|
||||
@ -4903,7 +4900,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu,
|
||||
or exhaust instruction count, stop generation. */
|
||||
if (status == NO_EXIT
|
||||
&& (dc.pc >= next_page_start
|
||||
|| tcg_ctx.gen_opc_ptr >= gen_opc_end
|
||||
|| tcg_op_buf_full()
|
||||
|| num_insns >= max_insns
|
||||
|| singlestep
|
||||
|| cs->singlestep_enabled)) {
|
||||
@ -4940,7 +4937,7 @@ static inline void gen_intermediate_code_internal(S390CPU *cpu,
|
||||
gen_tb_end(tb, num_insns);
|
||||
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
lj++;
|
||||
while (lj <= j) {
|
||||
tcg_ctx.gen_opc_instr_start[lj++] = 0;
|
||||
|
@ -1865,14 +1865,12 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb,
|
||||
CPUSH4State *env = &cpu->env;
|
||||
DisasContext ctx;
|
||||
target_ulong pc_start;
|
||||
static uint16_t *gen_opc_end;
|
||||
CPUBreakpoint *bp;
|
||||
int i, ii;
|
||||
int num_insns;
|
||||
int max_insns;
|
||||
|
||||
pc_start = tb->pc;
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
ctx.pc = pc_start;
|
||||
ctx.flags = (uint32_t)tb->flags;
|
||||
ctx.bstate = BS_NONE;
|
||||
@ -1891,7 +1889,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb,
|
||||
if (max_insns == 0)
|
||||
max_insns = CF_COUNT_MASK;
|
||||
gen_tb_start(tb);
|
||||
while (ctx.bstate == BS_NONE && tcg_ctx.gen_opc_ptr < gen_opc_end) {
|
||||
while (ctx.bstate == BS_NONE && !tcg_op_buf_full()) {
|
||||
if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
|
||||
QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
|
||||
if (ctx.pc == bp->pc) {
|
||||
@ -1904,7 +1902,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb,
|
||||
}
|
||||
}
|
||||
if (search_pc) {
|
||||
i = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
i = tcg_op_buf_count();
|
||||
if (ii < i) {
|
||||
ii++;
|
||||
while (ii < i)
|
||||
@ -1964,7 +1962,7 @@ gen_intermediate_code_internal(SuperHCPU *cpu, TranslationBlock *tb,
|
||||
gen_tb_end(tb, num_insns);
|
||||
|
||||
if (search_pc) {
|
||||
i = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
i = tcg_op_buf_count();
|
||||
ii++;
|
||||
while (ii <= i)
|
||||
tcg_ctx.gen_opc_instr_start[ii++] = 0;
|
||||
|
@ -5223,7 +5223,6 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu,
|
||||
CPUState *cs = CPU(cpu);
|
||||
CPUSPARCState *env = &cpu->env;
|
||||
target_ulong pc_start, last_pc;
|
||||
uint16_t *gen_opc_end;
|
||||
DisasContext dc1, *dc = &dc1;
|
||||
CPUBreakpoint *bp;
|
||||
int j, lj = -1;
|
||||
@ -5243,7 +5242,6 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu,
|
||||
dc->fpu_enabled = tb_fpu_enabled(tb->flags);
|
||||
dc->address_mask_32bit = tb_am_enabled(tb->flags);
|
||||
dc->singlestep = (cs->singlestep_enabled || singlestep);
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
|
||||
num_insns = 0;
|
||||
max_insns = tb->cflags & CF_COUNT_MASK;
|
||||
@ -5265,7 +5263,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu,
|
||||
}
|
||||
if (spc) {
|
||||
qemu_log("Search PC...\n");
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
if (lj < j) {
|
||||
lj++;
|
||||
while (lj < j)
|
||||
@ -5298,7 +5296,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu,
|
||||
if (dc->singlestep) {
|
||||
break;
|
||||
}
|
||||
} while ((tcg_ctx.gen_opc_ptr < gen_opc_end) &&
|
||||
} while (!tcg_op_buf_full() &&
|
||||
(dc->pc - pc_start) < (TARGET_PAGE_SIZE - 32) &&
|
||||
num_insns < max_insns);
|
||||
|
||||
@ -5322,7 +5320,7 @@ static inline void gen_intermediate_code_internal(SPARCCPU *cpu,
|
||||
gen_tb_end(tb, num_insns);
|
||||
|
||||
if (spc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
lj++;
|
||||
while (lj <= j)
|
||||
tcg_ctx.gen_opc_instr_start[lj++] = 0;
|
||||
|
@ -5500,7 +5500,6 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb,
|
||||
DisasContext ctx;
|
||||
target_ulong pc_start;
|
||||
int num_insns;
|
||||
uint16_t *gen_opc_end;
|
||||
|
||||
if (search_pc) {
|
||||
qemu_log("search pc %d\n", search_pc);
|
||||
@ -5508,7 +5507,6 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb,
|
||||
|
||||
num_insns = 0;
|
||||
pc_start = tb->pc;
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
ctx.pc = pc_start;
|
||||
ctx.saved_pc = -1;
|
||||
ctx.tb = tb;
|
||||
@ -5524,7 +5522,7 @@ gen_intermediate_code_internal(TriCoreCPU *cpu, struct TranslationBlock *tb,
|
||||
|
||||
num_insns++;
|
||||
|
||||
if (tcg_ctx.gen_opc_ptr >= gen_opc_end) {
|
||||
if (tcg_op_buf_full()) {
|
||||
gen_save_pc(ctx.next_pc);
|
||||
tcg_gen_exit_tb(0);
|
||||
break;
|
||||
|
@ -1877,7 +1877,6 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu,
|
||||
CPUUniCore32State *env = &cpu->env;
|
||||
DisasContext dc1, *dc = &dc1;
|
||||
CPUBreakpoint *bp;
|
||||
uint16_t *gen_opc_end;
|
||||
int j, lj;
|
||||
target_ulong pc_start;
|
||||
uint32_t next_page_start;
|
||||
@ -1891,8 +1890,6 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu,
|
||||
|
||||
dc->tb = tb;
|
||||
|
||||
gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
|
||||
dc->is_jmp = DISAS_NEXT;
|
||||
dc->pc = pc_start;
|
||||
dc->singlestep_enabled = cs->singlestep_enabled;
|
||||
@ -1933,7 +1930,7 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu,
|
||||
}
|
||||
}
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
if (lj < j) {
|
||||
lj++;
|
||||
while (lj < j) {
|
||||
@ -1965,7 +1962,7 @@ static inline void gen_intermediate_code_internal(UniCore32CPU *cpu,
|
||||
* Also stop translation when a page boundary is reached. This
|
||||
* ensures prefetch aborts occur at the right place. */
|
||||
num_insns++;
|
||||
} while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end &&
|
||||
} while (!dc->is_jmp && !tcg_op_buf_full() &&
|
||||
!cs->singlestep_enabled &&
|
||||
!singlestep &&
|
||||
dc->pc < next_page_start &&
|
||||
@ -2047,7 +2044,7 @@ done_generating:
|
||||
}
|
||||
#endif
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
lj++;
|
||||
while (lj <= j) {
|
||||
tcg_ctx.gen_opc_instr_start[lj++] = 0;
|
||||
|
@ -3021,7 +3021,6 @@ void gen_intermediate_code_internal(XtensaCPU *cpu,
|
||||
DisasContext dc;
|
||||
int insn_count = 0;
|
||||
int j, lj = -1;
|
||||
uint16_t *gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
|
||||
int max_insns = tb->cflags & CF_COUNT_MASK;
|
||||
uint32_t pc_start = tb->pc;
|
||||
uint32_t next_page_start =
|
||||
@ -3065,7 +3064,7 @@ void gen_intermediate_code_internal(XtensaCPU *cpu,
|
||||
check_breakpoint(env, &dc);
|
||||
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
if (lj < j) {
|
||||
lj++;
|
||||
while (lj < j) {
|
||||
@ -3117,7 +3116,7 @@ void gen_intermediate_code_internal(XtensaCPU *cpu,
|
||||
insn_count < max_insns &&
|
||||
dc.pc < next_page_start &&
|
||||
dc.pc + xtensa_insn_len(env, &dc) <= next_page_start &&
|
||||
tcg_ctx.gen_opc_ptr < gen_opc_end);
|
||||
!tcg_op_buf_full());
|
||||
|
||||
reset_litbase(&dc);
|
||||
reset_sar_tracker(&dc);
|
||||
@ -3143,7 +3142,7 @@ void gen_intermediate_code_internal(XtensaCPU *cpu,
|
||||
}
|
||||
#endif
|
||||
if (search_pc) {
|
||||
j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
j = tcg_op_buf_count();
|
||||
memset(tcg_ctx.gen_opc_instr_start + lj + 1, 0,
|
||||
(j - lj) * sizeof(tcg_ctx.gen_opc_instr_start[0]));
|
||||
} else {
|
||||
|
12
tcg/tcg.h
12
tcg/tcg.h
@ -537,6 +537,18 @@ struct TCGContext {
|
||||
|
||||
extern TCGContext tcg_ctx;
|
||||
|
||||
/* The number of opcodes emitted so far. */
|
||||
static inline int tcg_op_buf_count(void)
|
||||
{
|
||||
return tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
|
||||
}
|
||||
|
||||
/* Test for whether to terminate the TB for using too many opcodes. */
|
||||
static inline bool tcg_op_buf_full(void)
|
||||
{
|
||||
return tcg_op_buf_count() >= OPC_MAX_SIZE;
|
||||
}
|
||||
|
||||
/* pool based memory allocation */
|
||||
|
||||
void *tcg_malloc_internal(TCGContext *s, int size);
|
||||
|
Loading…
Reference in New Issue
Block a user