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i6300esb: fix timer overflow

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We use muldiv64() to compute the time to wait:

    timeout = muldiv64(get_ticks_per_sec(), timeout, 33000000);

but get_ticks_per_sec() is 10^9 (30 bit value) and timeout
is a 35 bit value.

Whereas muldiv64 is:

    uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c)

So we loose 3 bits of timeout.

Swapping get_ticks_per_sec() and timeout fixes it.

We can also replace it by a multiplication by 30 ns,
but this changes PCI clock frequency from 33MHz to 33.333333MHz
and we need to do this on all the QEMU PCI devices (later...)

Signed-off-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
This commit is contained in:
Laurent Vivier 2015-08-04 10:27:31 +02:00 committed by Michael Tokarev
parent 6883de6c9b
commit fee562e9e4
1 changed files with 1 additions and 1 deletions
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2
hw/watchdog/wdt_i6300esb.c
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@ -136,7 +136,7 @@ static void i6300esb_restart_timer(I6300State *d, int stage)
* multiply here can exceed 64-bits, before we divide by 33MHz, so * multiply here can exceed 64-bits, before we divide by 33MHz, so
* we use a higher-precision intermediate result. * we use a higher-precision intermediate result.
*/ */
timeout = muldiv64(get_ticks_per_sec(), timeout, 33000000); timeout = muldiv64(timeout, get_ticks_per_sec(), 33000000);
i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout); i6300esb_debug("stage %d, timeout %" PRIi64 "\n", d->stage, timeout);