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892a4f6a75
Currently QEMU ignores madvise(MADV_DONTNEED), which break apps that
rely on this for zeroing out memory [1]. Improve the situation by doing
a passthrough when the range in question is a host-page-aligned
anonymous mapping.
This is based on the patches from Simon Hausmann [2] and Chris Fallin
[3]. The structure is taken from Simon's patch. The PAGE_MAP_ANONYMOUS
bits are superseded by commit 26bab757d4
("linux-user: Introduce
PAGE_ANON"). In the end the patch acts like the one from Chris: we
either pass-through the entire syscall, or do nothing, since doing this
only partially would not help the affected applications much. Finally,
add some extra checks to match the behavior of the Linux kernel [4].
[1] https://gitlab.com/qemu-project/qemu/-/issues/326
[2] https://patchew.org/QEMU/20180827084037.25316-1-simon.hausmann@qt.io/
[3] https://github.com/bytecodealliance/wasmtime/blob/v0.37.0/ci/qemu-madvise.patch
[4] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/mm/madvise.c?h=v5.19-rc3#n1368
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220621144205.158452-1-iii@linux.ibm.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
187 lines
5.6 KiB
C
187 lines
5.6 KiB
C
/*
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* user-internals.h: prototypes etc internal to the linux-user implementation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LINUX_USER_USER_INTERNALS_H
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#define LINUX_USER_USER_INTERNALS_H
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#include "exec/user/thunk.h"
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#include "exec/exec-all.h"
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#include "qemu/log.h"
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extern char *exec_path;
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void init_task_state(TaskState *ts);
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void task_settid(TaskState *);
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void stop_all_tasks(void);
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extern const char *qemu_uname_release;
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extern unsigned long mmap_min_addr;
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typedef struct IOCTLEntry IOCTLEntry;
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typedef abi_long do_ioctl_fn(const IOCTLEntry *ie, uint8_t *buf_temp,
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int fd, int cmd, abi_long arg);
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struct IOCTLEntry {
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int target_cmd;
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unsigned int host_cmd;
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const char *name;
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int access;
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do_ioctl_fn *do_ioctl;
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const argtype arg_type[5];
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};
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extern IOCTLEntry ioctl_entries[];
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#define IOC_R 0x0001
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#define IOC_W 0x0002
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#define IOC_RW (IOC_R | IOC_W)
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/*
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* Returns true if the image uses the FDPIC ABI. If this is the case,
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* we have to provide some information (loadmap, pt_dynamic_info) such
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* that the program can be relocated adequately. This is also useful
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* when handling signals.
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*/
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int info_is_fdpic(struct image_info *info);
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void target_set_brk(abi_ulong new_brk);
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void syscall_init(void);
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abi_long do_syscall(CPUArchState *cpu_env, int num, abi_long arg1,
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abi_long arg2, abi_long arg3, abi_long arg4,
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abi_long arg5, abi_long arg6, abi_long arg7,
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abi_long arg8);
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extern __thread CPUState *thread_cpu;
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G_NORETURN void cpu_loop(CPUArchState *env);
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abi_long get_errno(abi_long ret);
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const char *target_strerror(int err);
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int get_osversion(void);
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void init_qemu_uname_release(void);
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void fork_start(void);
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void fork_end(int child);
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/**
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* probe_guest_base:
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* @image_name: the executable being loaded
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* @loaddr: the lowest fixed address in the executable
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* @hiaddr: the highest fixed address in the executable
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*
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* Creates the initial guest address space in the host memory space.
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*
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* If @loaddr == 0, then no address in the executable is fixed,
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* i.e. it is fully relocatable. In that case @hiaddr is the size
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* of the executable.
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*
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* This function will not return if a valid value for guest_base
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* cannot be chosen. On return, the executable loader can expect
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*
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* target_mmap(loaddr, hiaddr - loaddr, ...)
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*
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* to succeed.
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*/
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void probe_guest_base(const char *image_name,
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abi_ulong loaddr, abi_ulong hiaddr);
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/* syscall.c */
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int host_to_target_waitstatus(int status);
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#ifdef TARGET_I386
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/* vm86.c */
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void save_v86_state(CPUX86State *env);
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void handle_vm86_trap(CPUX86State *env, int trapno);
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void handle_vm86_fault(CPUX86State *env);
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int do_vm86(CPUX86State *env, long subfunction, abi_ulong v86_addr);
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#elif defined(TARGET_SPARC64)
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void sparc64_set_context(CPUSPARCState *env);
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void sparc64_get_context(CPUSPARCState *env);
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#endif
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static inline int is_error(abi_long ret)
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{
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return (abi_ulong)ret >= (abi_ulong)(-4096);
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}
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#if (TARGET_ABI_BITS == 32) && !defined(TARGET_ABI_MIPSN32)
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static inline uint64_t target_offset64(uint32_t word0, uint32_t word1)
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{
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#if TARGET_BIG_ENDIAN
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return ((uint64_t)word0 << 32) | word1;
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#else
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return ((uint64_t)word1 << 32) | word0;
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#endif
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}
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#else /* TARGET_ABI_BITS == 32 && !defined(TARGET_ABI_MIPSN32) */
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static inline uint64_t target_offset64(uint64_t word0, uint64_t word1)
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{
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return word0;
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}
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#endif /* TARGET_ABI_BITS != 32 */
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void print_termios(void *arg);
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/* ARM EABI and MIPS expect 64bit types aligned even on pairs or registers */
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#ifdef TARGET_ARM
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num)
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{
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return cpu_env->eabi == 1;
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}
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#elif defined(TARGET_MIPS) && defined(TARGET_ABI_MIPSO32)
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
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#elif defined(TARGET_PPC) && !defined(TARGET_PPC64)
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/*
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* SysV AVI for PPC32 expects 64bit parameters to be passed on odd/even pairs
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* of registers which translates to the same as ARM/MIPS, because we start with
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* r3 as arg1
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*/
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
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#elif defined(TARGET_SH4)
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/* SH4 doesn't align register pairs, except for p{read,write}64 */
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num)
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{
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switch (num) {
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case TARGET_NR_pread64:
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case TARGET_NR_pwrite64:
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return 1;
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default:
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return 0;
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}
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}
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#elif defined(TARGET_XTENSA)
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
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#elif defined(TARGET_HEXAGON)
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
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#else
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 0; }
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#endif
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/**
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* preexit_cleanup: housekeeping before the guest exits
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*
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* env: the CPU state
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* code: the exit code
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*/
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void preexit_cleanup(CPUArchState *env, int code);
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/*
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* Include target-specific struct and function definitions;
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* they may need access to the target-independent structures
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* above, so include them last.
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*/
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#include "target_cpu.h"
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#include "target_structs.h"
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#endif
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