xemu/tests/tcg/x86_64
Paolo Bonzini d1bb978ba1 target/i386: fix cmpxchg with 32-bit register destination
Unlike the memory case, where "the destination operand receives a write
cycle without regard to the result of the comparison", rm must not be
touched altogether if the write fails, including not zero-extending
it on 64-bit processors.  This is not how the movcond currently works,
because it is always followed by a gen_op_mov_reg_v to rm.

To fix it, introduce a new function that is similar to gen_op_mov_reg_v
but writes to a TCG temporary.

Considering that gen_extu(ot, oldv) is not needed in the memory case
either, the two cases for register and memory destinations are different
enough that one might as well fuse the two "if (mod == 3)" into one.
So do that too.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/508
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
[rth: Add a test case ]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-11-15 09:34:42 +10:00
..
system Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
cmpxchg.c target/i386: fix cmpxchg with 32-bit register destination 2022-11-15 09:34:42 +10:00
float_convd.ref tests/tcg: add float_convd test 2022-04-20 16:04:20 +01:00
float_convs.ref tests/tcg: add missing reference files for float_convs 2022-04-20 16:04:20 +01:00
Makefile.softmmu-target tests/tcg: clean up calls to run-test 2022-10-06 11:53:40 +01:00
Makefile.target target/i386: fix cmpxchg with 32-bit register destination 2022-11-15 09:34:42 +10:00
noexec.c target/i386: Make translator stop before the end of a page 2022-09-06 08:04:26 +01:00
vsyscall.c tests/tcg/x86_64: add vsyscall smoke test 2021-05-20 14:19:30 +02:00