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0336cbf853
While the vargs approach was flexible the original MTTCG ended up having munge the bits to a bitmap so the data could be used in deferred work helpers. Instead of hiding that in cputlb we push the change to the API to make it take a bitmap of MMU indexes instead. For ARM some the resulting flushes end up being quite long so to aid readability I've tended to move the index shifting to a new line so all the bits being or-ed together line up nicely, for example: tlb_flush_page_by_mmuidx(other_cs, pageaddr, (1 << ARMMMUIdx_S1SE1) | (1 << ARMMMUIdx_S1SE0)); Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [AT: SPARC parts only] Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> [PM: ARM parts only] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> |
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user | ||
address-spaces.h | ||
cpu_ldst_template.h | ||
cpu_ldst_useronly_template.h | ||
cpu_ldst.h | ||
cpu-all.h | ||
cpu-common.h | ||
cpu-defs.h | ||
cputlb.h | ||
exec-all.h | ||
gdbstub.h | ||
gen-icount.h | ||
helper-gen.h | ||
helper-head.h | ||
helper-proto.h | ||
helper-tcg.h | ||
hwaddr.h | ||
ioport.h | ||
log.h | ||
memattrs.h | ||
memory-internal.h | ||
memory.h | ||
poison.h | ||
ram_addr.h | ||
ramlist.h | ||
semihost.h | ||
softmmu-semi.h | ||
tb-context.h | ||
tb-hash-xx.h | ||
tb-hash.h |