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6ebf5905f4
The only reason we have bswap versions of the pci host code is that most pci host devices are little endian. The ppc e500 is the only odd one here, being big endian. So let's directly pass the endianness down to the mmio layer and not worry about it on the pci host layer. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
134 lines
4.1 KiB
C
134 lines
4.1 KiB
C
/*
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* QEMU DEC 21154 PCI bridge
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*
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* Copyright (c) 2006-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "dec_pci.h"
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#include "sysbus.h"
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#include "pci.h"
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#include "pci_host.h"
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#include "pci_bridge.h"
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#include "pci_internals.h"
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/* debug DEC */
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//#define DEBUG_DEC
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#ifdef DEBUG_DEC
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#define DEC_DPRINTF(fmt, ...) \
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do { printf("DEC: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define DEC_DPRINTF(fmt, ...)
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#endif
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typedef struct DECState {
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SysBusDevice busdev;
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PCIHostState host_state;
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} DECState;
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static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
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{
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return irq_num;
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}
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static int dec_21154_initfn(PCIDevice *dev)
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{
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int rc;
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rc = pci_bridge_initfn(dev);
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if (rc < 0) {
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return rc;
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}
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pci_config_set_vendor_id(dev->config, PCI_VENDOR_ID_DEC);
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pci_config_set_device_id(dev->config, PCI_DEVICE_ID_DEC_21154);
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return 0;
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}
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static PCIDeviceInfo dec_21154_pci_bridge_info = {
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.qdev.name = "dec-21154-p2p-bridge",
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.qdev.desc = "DEC 21154 PCI-PCI bridge",
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.qdev.size = sizeof(PCIBridge),
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.qdev.vmsd = &vmstate_pci_device,
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.qdev.reset = pci_bridge_reset,
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.init = dec_21154_initfn,
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.exit = pci_bridge_exitfn,
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.config_write = pci_bridge_write_config,
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.is_bridge = 1,
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};
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PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
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{
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PCIDevice *dev;
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PCIBridge *br;
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dev = pci_create_multifunction(parent_bus, devfn, false,
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"dec-21154-p2p-bridge");
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br = DO_UPCAST(PCIBridge, dev, dev);
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pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
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qdev_init_nofail(&dev->qdev);
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return pci_bridge_get_sec_bus(br);
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}
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static int pci_dec_21154_init_device(SysBusDevice *dev)
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{
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DECState *s;
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int pci_mem_config, pci_mem_data;
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s = FROM_SYSBUS(DECState, dev);
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pci_mem_config = pci_host_conf_register_mmio(&s->host_state,
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DEVICE_LITTLE_ENDIAN);
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pci_mem_data = pci_host_data_register_mmio(&s->host_state,
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DEVICE_LITTLE_ENDIAN);
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sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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return 0;
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}
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static int dec_21154_pci_host_init(PCIDevice *d)
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{
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/* PCI2PCI bridge same values as PearPC - check this */
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pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC);
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pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154);
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pci_set_byte(d->config + PCI_REVISION_ID, 0x02);
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pci_config_set_class(d->config, PCI_CLASS_BRIDGE_PCI);
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return 0;
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}
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static PCIDeviceInfo dec_21154_pci_host_info = {
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.qdev.name = "dec-21154",
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.qdev.size = sizeof(PCIDevice),
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.init = dec_21154_pci_host_init,
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.is_bridge = 1,
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};
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static void dec_register_devices(void)
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{
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sysbus_register_dev("dec-21154", sizeof(DECState),
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pci_dec_21154_init_device);
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pci_qdev_register(&dec_21154_pci_host_info);
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pci_qdev_register(&dec_21154_pci_bridge_info);
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}
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device_init(dec_register_devices)
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