Peter Maydell 84cbd63f87 X86 queue, 2015-04-27 (v2) ... -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABCAAGBQJVPoMfAAoJECgHk2+YTcWmzuQQAIOf4o/0t/lV87uR1/smP+E/ mvdWm9FiaRXkc0SYrIdpNoPyyMfNnzwDocywIaMcMNEzxMe1oP/objm3yWuOpeeH Q26oMt/phXsPBRl5vxhAQ29LxuCagDivRFyTUxa7E8/D9GKmVFE6/orwHeMfwUEs frILNM5lCLiXk4dgeQPW9xWb8iAm/RVRWFRIya5HVh51PjjsN/iLQDtSLM5Ivvvn Pn5+cspcjD6bjM3tGiXYJZtUdoKh/7Dc8QLHhOOGd0XGysnfEbsmNQbk5Kl62PL/ 3Ug0yQWpecM5IrmPWi/Omh2YJNdTbrjsOMaLWZv2LtWl/o8mD51rPJeK9Pfym/26 dsQgcYK/0GowEOxb/PUkWoX7eNziUyKryksgtdLxyrcllO5QKhrkTibDh8UOKYwI X6qEqrhCJ8pN6GhFJYK/2ieMajOoa3TE7WE5CenEPFyEmDqQkKWrjUyc0YZjcZ98 cHJESCyXxaetzpwt17WT+vaEwpKyj7RBBS55fuV7S6+QRpWewyvxsKcEe7nfHDPe k7VOkG7YD0LX9dnoFGLvHbxms/QUji5K2rprvZYdA5PNywTwRsyW58XR/G1jOU2Q oDkLL+B52A3+cBUz4n7yrP4GumvxTR9mfOGbvdKXRYHyJka74aoGecPblAVz3ew4 UTgqXmdlJzA5SzyPObcq =t4Wd -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging X86 queue, 2015-04-27 (v2) # gpg: Signature made Mon Apr 27 19:42:39 2015 BST using RSA key ID 984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-pull-request: target-i386: Remove AMD feature flag aliases from CPU model table target-i386: X86CPU::xlevel2 QOM property target-i386: Make "level" and "xlevel" properties static qemu-config: Accept empty option values MAINTAINERS: Change status of X86 to Maintained MAINTAINERS: Add myself to X86 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2015-04-28 12:22:20 +01:00
..
arch_dump.c	x86: Fuse g_malloc(); memset() into g_malloc0()	2014-12-15 12:21:02 +01:00
arch_memory_mapping.c	Switch non-CPU callers from ld/st*_phys to address_space_ld/st*	2015-04-26 16:49:24 +01:00
cc_helper_template.h	target-i386: Implement BLSR, BLSMSK, BLSI	2013-02-18 15:52:05 -08:00
cc_helper.c	tcg: Invert the inclusion of helper.h	2014-05-28 09:33:54 -07:00
cpu-qom.h	target-i386: Require APIC ID to be explicitly set before CPU realize	2015-03-09 16:30:03 -03:00
cpu.c	target-i386: Remove AMD feature flag aliases from CPU model table	2015-04-27 15:41:03 -03:00
cpu.h	target-i386: remove superfluous TARGET_HAS_SMC macro	2015-04-04 09:45:59 +03:00
excp_helper.c	tcg: Invert the inclusion of helper.h	2014-05-28 09:33:54 -07:00
fpu_helper.c	target-i386: fbld instruction doesn't set minus sign	2014-12-14 16:34:29 -06:00
gdbstub.c	target-i386: update fp status fix	2014-09-18 17:06:12 +02:00
helper.c	qemu-log: add log category for MMU info	2014-12-16 18:43:19 +00:00
helper.h	tcg: Invert the inclusion of helper.h	2014-05-28 09:33:54 -07:00
int_helper.c	tcg: Invert the inclusion of helper.h	2014-05-28 09:33:54 -07:00
ioport-user.c
kvm_i386.h	kvm: forward INIT signals coming from the chipset	2014-05-13 13:12:40 +02:00
kvm-stub.c	target-i386: Fix build by providing stub kvm_arch_get_supported_cpuid()	2013-11-21 17:39:11 +01:00
kvm.c	misc fixes and cleanups	2015-03-12 09:13:07 +00:00
machine.c	target-i386: make xmm_regs 512-bit wide	2015-01-26 12:22:44 +01:00
Makefile.objs	Makefile.target: CONFIG_NO_* variables removed	2013-10-16 18:21:00 +02:00
mem_helper.c	softmmu: introduce cpu_ldst.h	2014-06-05 16:10:33 +02:00
misc_helper.c	target-i386: move check_io helpers to seg_helper.c	2014-06-05 16:10:34 +02:00
ops_sse_header.h	target-i386: add AES-NI instructions	2013-04-13 13:51:57 +02:00
ops_sse.h	target-i386: simplify AES emulation	2014-12-15 12:21:01 +01:00
seg_helper.c	x86: fix SS selector in SYSRET	2015-03-10 11:18:24 +01:00
shift_helper_template.h
smm_helper.c	target-i386: save 64-bit CR3 in 64-bit SMM state save area	2015-04-02 15:57:27 +02:00
svm_helper.c	Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into staging	2014-06-05 21:06:14 +01:00
svm.h
TODO
translate.c	tcg: Change translator-side labels to a pointer	2015-03-13 12:28:18 -07:00