xemu/target/sparc/TODO
Thomas Huth fcf5ef2ab5 Move target-* CPU file into a target/ folder
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are likely to be included soon, too, so the main
folder of the QEMU sources slowly gets quite overcrowded with the
target-xxx folders.
To disburden the main folder a little bit, let's move the target-xxx
folders into a dedicated target/ folder, so that target-xxx/ simply
becomes target/xxx/ instead.

Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part]
Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part]
Acked-by: Michael Walle <michael@walle.cc> [lm32 part]
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part]
Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part]
Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part]
Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part]
Acked-by: Richard Henderson <rth@twiddle.net> [alpha part]
Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part]
Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part]
Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [cris&microblaze part]
Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part]
Signed-off-by: Thomas Huth <thuth@redhat.com>
2016-12-20 21:52:12 +01:00

89 lines
2.2 KiB
Plaintext

TODO-list:
CPU common:
- Unimplemented features/bugs:
- Delay slot handling may fail sometimes (branch end of page, delay
slot next page)
- Atomical instructions
- CPU features should match real CPUs (also ASI selection)
- Optimizations/improvements:
- Condition code/branch handling like x86, also for FPU?
- Remove remaining explicit alignment checks
- Global register for regwptr, so that windowed registers can be
accessed directly
- Improve Sparc32plus addressing
- NPC/PC static optimisations (use JUMP_TB when possible)? (Is this
obsolete?)
- Synthetic instructions
- MMU model dependent on CPU model
- Select ASI helper at translation time (on V9 only if known)
- KQemu/KVM support for VM only
- Hardware breakpoint/watchpoint support
- Cache emulation mode
- Reverse-endian pages
- Faster FPU emulation
- Busy loop detection
Sparc32 CPUs:
- Unimplemented features/bugs:
- Sun4/Sun4c MMUs
- Some V8 ASIs
Sparc64 CPUs:
- Unimplemented features/bugs:
- Interrupt handling
- Secondary address space, other MMU functions
- Many V9/UA2005/UA2007 ASIs
- Rest of V9 instructions, missing VIS instructions
- IG/MG/AG vs. UA2007 globals
- Full hypervisor support
- SMP/CMT
- Sun4v CPUs
Sun4:
- To be added
Sun4c:
- A lot of unimplemented features
- Maybe split from Sun4m
Sun4m:
- Unimplemented features/bugs:
- Hardware devices do not match real boards
- Floppy does not work
- CS4231: merge with cs4231a, add DMA
- Add cg6, bwtwo
- Arbitrary resolution support
- PCI for MicroSparc-IIe
- JavaStation machines
- SBus slot probing, FCode ROM support
- SMP probing support
- Interrupt routing does not match real HW
- SuSE 7.3 keyboard sometimes unresponsive
- Gentoo 2004.1 SMP does not work
- SS600MP ledma -> lebuffer
- Type 5 keyboard
- Less fixed hardware choices
- DBRI audio (Am7930)
- BPP parallel
- Diagnostic switch
- ESP PIO mode
Sun4d:
- A lot of unimplemented features:
- SBI
- IO-unit
- Maybe split from Sun4m
Sun4u:
- Unimplemented features/bugs:
- Interrupt controller
- PCI/IOMMU support (Simba, JIO, Tomatillo, Psycho, Schizo, Safari...)
- SMP
- Happy Meal Ethernet, flash, I2C, GPIO
- A lot of real machine types
Sun4v:
- A lot of unimplemented features
- A lot of real machine types