xemu/target-sparc
Peter Maydell 0e88d45a33 target-sparc: Use VMState arrays for SPARC64 TLB/MMU state
Use VMState arrays for SPARC64 TLB/MMU state. This is
a migration-break for SPARC64 (but not for SPARC32),
which is acceptable because currently migration does not
work for any SPARC64 machines due to the lack of any migration
of interrupt controller state.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2016-01-16 12:01:23 +00:00
..
cc_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
cpu-qom.h target-sparc: Convert to VMStateDescription 2016-01-16 12:01:23 +00:00
cpu.c target-sparc: Convert to VMStateDescription 2016-01-16 12:01:23 +00:00
cpu.h target-sparc: Convert to VMStateDescription 2016-01-16 12:01:23 +00:00
fop_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
gdbstub.c
helper.c target-sparc: implement NPT timer bit 2016-01-07 12:21:06 +00:00
helper.h target-sparc: implement NPT timer bit 2016-01-07 12:21:06 +00:00
int32_helper.c exec: Change cpu_abort() argument to CPUState 2014-03-13 19:52:28 +01:00
int64_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
ldst_helper.c target-sparc: is_translating_asi() is TARGET_SPARC64 only 2015-01-21 16:18:01 +00:00
machine.c target-sparc: Use VMState arrays for SPARC64 TLB/MMU state 2016-01-16 12:01:23 +00:00
Makefile.objs monitor: remove target-specific code from monitor.c 2015-09-16 17:33:32 +02:00
mmu_helper.c tlb: Add "ifetch" argument to cpu_mmu_index() 2015-09-11 08:15:28 -07:00
monitor.c monitor: remove target-specific code from monitor.c 2015-09-16 17:33:32 +02:00
TODO
translate.c target-sparc: implement NPT timer bit 2016-01-07 12:21:06 +00:00
vis_helper.c target-sparc: fix 32-bit truncation in fpackfix 2015-11-26 16:47:44 +01:00
win_helper.c target-sparc: Split cpu_put_psr into side-effect and no-side-effect parts 2016-01-16 12:01:23 +00:00