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50eac424c7
Fix bcm2835 framebuffer for rpi firmware. Add FEAT_ETS. Add FEAT_PMUv3p5. Cleanups to armv7m_load_kernel. -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmMhwAsdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/7Xgf9Ezg+etwsEzY0EWtH yoQ7ymJHM1VKqtLkbk9U+Ju18YHEi3fwbYbfLgzkAMFHKDUteKJivKm2w41tsw5g lE+5PojQT3k8PffaqeFzKG/JsDPoqKtTa23WjkafbIQAbjRT8JtmF/JmSLaaxyqW DozPXJ9jXMS+Q2BxHnoCBuy/Kb3zsqekCr8DOgUIXY5gcAB6q1I8SMX2BrhsIyvV vZxNm+hFDCOJtXvkAekMrwGkiIBYoBNpswnv40ldeSvRtD8tnty73JUt+AnWoCwi zH4k+CvWICIuZT7oxVecRhlOojtaP5cUTXs0+zhk6GxEx/X6wmXd42heO9ZJL0y1 6FH0xw== =ohPU -----END PGP SIGNATURE----- Merge tag 'pull-arm-20220914' of https://gitlab.com/rth7680/qemu into staging Add cortex-a35. Fix bcm2835 framebuffer for rpi firmware. Add FEAT_ETS. Add FEAT_PMUv3p5. Cleanups to armv7m_load_kernel. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmMhwAsdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/7Xgf9Ezg+etwsEzY0EWtH # yoQ7ymJHM1VKqtLkbk9U+Ju18YHEi3fwbYbfLgzkAMFHKDUteKJivKm2w41tsw5g # lE+5PojQT3k8PffaqeFzKG/JsDPoqKtTa23WjkafbIQAbjRT8JtmF/JmSLaaxyqW # DozPXJ9jXMS+Q2BxHnoCBuy/Kb3zsqekCr8DOgUIXY5gcAB6q1I8SMX2BrhsIyvV # vZxNm+hFDCOJtXvkAekMrwGkiIBYoBNpswnv40ldeSvRtD8tnty73JUt+AnWoCwi # zH4k+CvWICIuZT7oxVecRhlOojtaP5cUTXs0+zhk6GxEx/X6wmXd42heO9ZJL0y1 # 6FH0xw== # =ohPU # -----END PGP SIGNATURE----- # gpg: Signature made Wed 14 Sep 2022 07:50:35 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-arm-20220914' of https://gitlab.com/rth7680/qemu: target/arm: Make boards pass base address to armv7m_load_kernel() target/arm: Remove useless TARGET_BIG_ENDIAN check in armv7m_load_kernel() target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max' target/arm: Support 64-bit event counters for FEAT_PMUv3p5 target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits target/arm: Rename pmu_8_n feature test functions target/arm: Detect overflow when calculating next PMU interrupt target/arm: Honour MDCR_EL2.HPMD in Secure EL2 target/arm: Ignore PMCR.D when PMCR.LC is set target/arm: Don't mishandle count when enabling or disabling PMU counters target/arm: Correct value returned by pmu_counter_mask() target/arm: Don't corrupt high half of PMOVSR when cycle counter overflows target/arm: Add missing space in comment target/arm: Advertise FEAT_ETS for '-cpu max' target/arm: Implement ID_DFR1 target/arm: Implement ID_MMFR5 target/arm: Sort KVM reads of AArch32 ID registers into encoding order target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8 hw/arm/bcm2835_property: Add support for RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS target/arm: Add cortex-a35 Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> |
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.. | ||
9pfs | ||
acpi | ||
adc | ||
alpha | ||
arm | ||
audio | ||
avr | ||
block | ||
char | ||
core | ||
cpu | ||
cris | ||
cxl | ||
display | ||
dma | ||
gpio | ||
hppa | ||
hyperv | ||
i2c | ||
i386 | ||
ide | ||
input | ||
intc | ||
ipack | ||
ipmi | ||
isa | ||
loongarch | ||
m68k | ||
mem | ||
microblaze | ||
mips | ||
misc | ||
net | ||
nios2 | ||
nubus | ||
nvme | ||
nvram | ||
openrisc | ||
pci | ||
pci-bridge | ||
pci-host | ||
pcmcia | ||
ppc | ||
rdma | ||
remote | ||
riscv | ||
rtc | ||
rx | ||
s390x | ||
scsi | ||
sd | ||
sensor | ||
sh4 | ||
smbios | ||
sparc | ||
sparc64 | ||
ssi | ||
timer | ||
tpm | ||
tricore | ||
usb | ||
vfio | ||
virtio | ||
watchdog | ||
xen | ||
xenpv | ||
xtensa | ||
Kconfig | ||
meson.build |