Richard Henderson 11f4e8f8bf tcg: Remove TCGV_EQUAL* ...

When we used structures for TCGv_*, we needed a macro in order to
perform a comparison.  Now that we use pointers, this is just clutter.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

2017-10-24 21:50:15 +02:00

..

alpha

tcg: remove addr argument from lookup_tb_ptr

2017-10-10 07:37:10 -07:00

arm

target/arm: Implement SG instruction corner cases

2017-10-12 13:23:14 +01:00

cris

tcg: Remove TCGV_EQUAL*

2017-10-24 21:50:15 +02:00

hppa

tcg: remove addr argument from lookup_tb_ptr

2017-10-10 07:37:10 -07:00

i386

tcg: Remove TCGV_EQUAL*

2017-10-24 21:50:15 +02:00

lm32

qom/cpu: move cpu_model null check to cpu_class_by_name()

2017-10-09 23:21:52 -03:00

m68k

tcg: Remove TCGV_EQUAL*

2017-10-24 21:50:15 +02:00

microblaze

target: [tcg] Use a generic enum for DISAS_ values

2017-09-06 08:06:47 -07:00

mips

linux-user: Tidy and enforce reserved_va initialization

2017-10-16 16:00:56 +03:00

moxie

qom/cpu: move cpu_model null check to cpu_class_by_name()

2017-10-09 23:21:52 -03:00

nios2

* TCG 8-byte atomic accesses bugfix (Andrew)

2017-10-19 15:38:07 +01:00

openrisc

openrisc/cputimer: Perparation for Multicore

2017-10-21 06:35:47 +09:00

ppc

tcg: Remove TCGV_EQUAL*

2017-10-24 21:50:15 +02:00

s390x

s390x/tcg: low-address protection support

2017-10-20 13:32:10 +02:00

sh4

linux-user/sh4: Reduce TARGET_VIRT_ADDR_SPACE_BITS to 31

2017-10-16 16:00:56 +03:00

sparc

tcg: Remove GET_TCGV_* and MAKE_TCGV_*

2017-10-24 21:49:30 +02:00

tilegx

tilegx: replace cpu_tilegx_init() with cpu_generic_init()

2017-09-01 11:54:24 -03:00

tricore

qom/cpu: move cpu_model null check to cpu_class_by_name()

2017-10-09 23:21:52 -03:00

unicore32

qom/cpu: move cpu_model null check to cpu_class_by_name()

2017-10-09 23:21:52 -03:00

xtensa

qom/cpu: move cpu_model null check to cpu_class_by_name()

2017-10-09 23:21:52 -03:00