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1c0744190c
xemu/target-ppc/translate
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Nikunj A Dadhania 1c0744190c target-ppc: add lxvh8x instruction 
lxvh8x:  Load VSX Vector Halfword*8

Big-Endian Storage
+-------+-------+-------+-------+-------+-------+-------+-------+
| 00 01 | 10 11 | 20 21 | 30 31 | 40 41 | 50 51 | 60 61 | 70 71 |
+-------+-------+-------+-------+-------+-------+-------+-------+

Little-Endian Storage
+-------+-------+-------+-------+-------+-------+-------+-------+
| 01 00 | 11 10 | 21 20 | 31 30 | 41 40 | 51 50 | 61 60 | 71 70 |
+-------+-------+-------+-------+-------+-------+-------+-------+

Vector load results in (16-bit elements):
+------+------+------+------+------+------+------+------+
| 0001 | 1011 | 2021 | 3031 | 4041 | 5051 | 6061 | 7071 |
+------+------+------+------+------+------+------+------+

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
[dwg: Tweak to commit description]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2016-10-05 11:05:28 +11:00
..
dfp-impl.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
dfp-ops.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
fp-impl.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
fp-ops.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
spe-impl.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
spe-ops.inc.c ppc: Rename #include'd .c files to .inc.c 2016-09-07 12:40:12 +10:00
vmx-impl.inc.c target-ppc: convert st64 to use new macro 2016-09-23 10:29:40 +10:00
vmx-ops.inc.c target-ppc: add vector permute right indexed instruction 2016-09-23 10:29:40 +10:00
vsx-impl.inc.c target-ppc: add lxvh8x instruction 2016-10-05 11:05:28 +11:00
vsx-ops.inc.c target-ppc: add lxvh8x instruction 2016-10-05 11:05:28 +11:00