xemu/target/ppc
Stefan Brankovic 1cc792698e target/ppc: Optimize emulation of lvsl and lvsr instructions
Adding simple macro that is calling tcg implementation of appropriate
instruction if altivec support is active.

Optimization of altivec instruction lvsl (Load Vector for Shift Left).
Place bytes sh:sh+15 of value 0x00 || 0x01 || 0x02 || ... || 0x1E || 0x1F
in destination register. Sh is calculated by adding 2 source registers and
getting bits 60-63 of result.

First, the bits [28-31] are placed from EA to variable sh. After that,
the bytes are created in the following way:
sh:(sh+7) of X(from description) by multiplying sh with 0x0101010101010101
followed by addition of the result with 0x0001020304050607. Value obtained
is placed in higher doubleword element of vD.
(sh+8):(sh+15) by adding the result of previous multiplication with
0x08090a0b0c0d0e0f. Value obtained is placed in lower doubleword element
of vD.

Optimization of altivec instruction lvsr (Load Vector for Shift Right).
Place bytes 16-sh:31-sh of value 0x00 || 0x01 || 0x02 || ... || 0x1E ||
0x1F in destination register. Sh is calculated by adding 2 source
registers and getting bits 60-63 of result.

First, the bits [28-31] are placed from EA to variable sh. After that,
the bytes are created in the following way:
sh:(sh+7) of X(from description) by multiplying sh with 0x0101010101010101
followed by substraction of the result from 0x1011121314151617. Value
obtained is placed in higher doubleword element of vD.
(sh+8):(sh+15) by substracting the result of previous multiplication from
0x18191a1b1c1d1e1f. Value obtained is placed in lower doubleword element
of vD.

Signed-off-by: Stefan Brankovic <stefan.brankovic@rt-rk.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <1563200574-11098-2-git-send-email-stefan.brankovic@rt-rk.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-08-21 17:17:11 +10:00
..
translate target/ppc: Optimize emulation of lvsl and lvsr instructions 2019-08-21 17:17:11 +10:00
arch_dump.c target/ppc: Add helper_mfvscr 2019-02-18 11:00:44 +11:00
compat.c target/ppc: Allow cpu compatiblity checks based on type, not instance 2018-06-21 21:22:53 +10:00
cpu-models.c Include qemu/module.h where needed, drop it from qemu-common.h 2019-06-12 13:18:33 +02:00
cpu-models.h target/ppc: Style fixes for ppc-models.[ch] 2019-04-26 10:41:24 +10:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h migration: Do not re-read the clock on pre_save in case of paused guest 2019-08-21 17:17:11 +10:00
cpu.c target/ppc: support for 32-bit carry and overflow 2017-03-01 11:23:39 +11:00
cpu.h migration: Move the VMStateDescription typedef to typedefs.h 2019-08-16 13:31:52 +02:00
dfp_helper.c target/ppc: Style fixes for dfp_helper.c 2019-04-26 10:42:38 +10:00
excp_helper.c target/ppc: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
fpu_helper.c target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro 2019-07-02 09:43:58 +10:00
gdbstub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
helper_regs.h target/ppc: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
helper.h target/ppc: Optimize emulation of lvsl and lvsr instructions 2019-08-21 17:17:11 +10:00
int_helper.c target/ppc: Optimize emulation of lvsl and lvsr instructions 2019-08-21 17:17:11 +10:00
internal.h target/ppc: remove getVSR()/putVSR() from int_helper.c 2019-07-02 09:43:58 +10:00
kvm_ppc.h target/ppc/machine: Add kvmppc_pvr_workaround_required() stub 2019-07-02 09:43:58 +10:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00
machine.c Include hw/boards.h a bit less 2019-08-16 13:31:53 +02:00
Makefile.objs build: remove CONFIG_LIBDECNUMBER 2017-10-16 18:03:52 +02:00
mem_helper.c Include qemu/main-loop.h less 2019-08-16 13:31:52 +02:00
mfrom_table_gen.c target/ppc: Style fixes for mfrom_table.inc.c & mfrom_table_gen.c 2019-04-26 10:42:38 +10:00
mfrom_table.inc.c target/ppc: Style fixes for mfrom_table.inc.c & mfrom_table_gen.c 2019-04-26 10:42:38 +10:00
misc_helper.c Include qemu/main-loop.h less 2019-08-16 13:31:52 +02:00
mmu_helper.c Include qemu/main-loop.h less 2019-08-16 13:31:52 +02:00
mmu-book3s-v3.c target/ppc: Support for POWER9 native hash 2019-02-26 09:21:25 +11:00
mmu-book3s-v3.h Clean up header guards that don't match their file name 2019-05-13 08:58:55 +02:00
mmu-hash32.c ppc/hash32: Rework R and C bit updates 2019-04-26 11:37:57 +10:00
mmu-hash32.h target/ppc: Manage external HPT via virtual hypervisor 2017-03-01 11:23:39 +11:00
mmu-hash64.c target/ppc: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
mmu-hash64.h ppc/hash64: Rework R and C bit updates 2019-04-26 11:37:57 +10:00
mmu-radix64.c target/ppc: Don't check UPRT in radix mode when in HV real mode 2019-04-26 11:37:57 +10:00
mmu-radix64.h target/ppc: Rename PATB/PATBE -> PATE 2019-02-26 09:21:25 +11:00
monitor.c hmp: Move hmp.h to include/monitor/ 2019-07-02 07:19:45 +02:00
timebase_helper.c
trace-events target/ppc/kvm: Fix trace typo 2019-05-29 11:39:44 +10:00
translate_init.inc.c qapi: Split machine-target.json off target.json and misc.json 2019-07-02 13:37:00 +02:00
translate.c Include qemu/main-loop.h less 2019-08-16 13:31:52 +02:00
user_only_helper.c target/ppc: Convert to CPUClass::tlb_fill 2019-05-10 11:12:50 -07:00