xemu/target-tricore at 1f75cba8f8e0acb079b196e73874595b9523094f - xemu

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History

Bastian Koppelmann 1f75cba8f8 target-tricore: add missing break in insn decode switch stmt

After decoding/translating a RRR_DIVIDE/RRRR_EXTRACT_INSERT type instruction
we would simply fall through and would decode/translate another unintended
RRR2_MADD/RRRW_EXTRACT_INSERT instruction.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <1458547383-23102-2-git-send-email-kbastian@mail.uni-paderborn.de>

2016-03-23 09:22:48 +01:00

cpu-qom.h

target-tricore: Remove the dummy interrupt boilerplate

2014-09-25 18:54:22 +01:00

cpu.c

tricore: Clean up includes

2016-01-29 15:07:25 +00:00

cpu.h

target-tricore: Add trap handling & SOVF/OVF traps

2016-02-25 12:54:42 +01:00

csfr.def

target-tricore: Fix new typos