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96eacf6413
The arm_boot secondary boot loader code needs the address of the GIC CPU interface. Obtaining this from the base address of the private peripheral region was possible for A9 and 11MPcore, but the A15 puts the GIC CPU interface in a different place. So make boards pass in the GIC CPU interface address directly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
178 lines
5.7 KiB
C
178 lines
5.7 KiB
C
/*
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* Samsung exynos4 SoC based boards emulation
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved.
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* Maksim Kozlov <m.kozlov@samsung.com>
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* Evgeny Voevodin <e.voevodin@samsung.com>
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* Igor Mitsyanko <i.mitsyanko@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include "sysemu.h"
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#include "sysbus.h"
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#include "net.h"
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#include "arm-misc.h"
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#include "exec-memory.h"
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#include "exynos4210.h"
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#include "boards.h"
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#undef DEBUG
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//#define DEBUG
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#ifdef DEBUG
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#undef PRINT_DEBUG
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#define PRINT_DEBUG(fmt, args...) \
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do { \
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fprintf(stderr, " [%s:%d] "fmt, __func__, __LINE__, ##args); \
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} while (0)
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#else
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#define PRINT_DEBUG(fmt, args...) do {} while (0)
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#endif
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#define SMDK_LAN9118_BASE_ADDR 0x05000000
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typedef enum Exynos4BoardType {
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EXYNOS4_BOARD_NURI,
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EXYNOS4_BOARD_SMDKC210,
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EXYNOS4_NUM_OF_BOARDS
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} Exynos4BoardType;
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static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = 0xD33,
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[EXYNOS4_BOARD_SMDKC210] = 0xB16,
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};
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static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG,
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[EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG,
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};
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static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = 0x40000000,
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[EXYNOS4_BOARD_SMDKC210] = 0x40000000,
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};
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static struct arm_boot_info exynos4_board_binfo = {
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.loader_start = EXYNOS4210_BASE_BOOT_ADDR,
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.smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR,
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.nb_cpus = EXYNOS4210_NCPUS,
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};
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static QEMUMachine exynos4_machines[EXYNOS4_NUM_OF_BOARDS];
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static void lan9215_init(uint32_t base, qemu_irq irq)
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{
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DeviceState *dev;
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SysBusDevice *s;
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/* This should be a 9215 but the 9118 is close enough */
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if (nd_table[0].vlan) {
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qemu_check_nic_model(&nd_table[0], "lan9118");
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dev = qdev_create(NULL, "lan9118");
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qdev_set_nic_properties(dev, &nd_table[0]);
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qdev_prop_set_uint32(dev, "mode_16bit", 1);
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qdev_init_nofail(dev);
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s = sysbus_from_qdev(dev);
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sysbus_mmio_map(s, 0, base);
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sysbus_connect_irq(s, 0, irq);
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}
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}
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static Exynos4210State *exynos4_boards_init_common(
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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Exynos4BoardType board_type)
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{
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if (smp_cpus != EXYNOS4210_NCPUS) {
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fprintf(stderr, "%s board supports only %d CPU cores. Ignoring smp_cpus"
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" value.\n",
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exynos4_machines[board_type].name,
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exynos4_machines[board_type].max_cpus);
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}
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exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type];
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exynos4_board_binfo.board_id = exynos4_board_id[board_type];
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exynos4_board_binfo.smp_bootreg_addr =
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exynos4_board_smp_bootreg_addr[board_type];
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exynos4_board_binfo.kernel_filename = kernel_filename;
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exynos4_board_binfo.initrd_filename = initrd_filename;
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exynos4_board_binfo.kernel_cmdline = kernel_cmdline;
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exynos4_board_binfo.gic_cpu_if_addr =
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EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100;
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PRINT_DEBUG("\n ram_size: %luMiB [0x%08lx]\n"
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" kernel_filename: %s\n"
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" kernel_cmdline: %s\n"
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" initrd_filename: %s\n",
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exynos4_board_ram_size[board_type] / 1048576,
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exynos4_board_ram_size[board_type],
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kernel_filename,
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kernel_cmdline,
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initrd_filename);
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return exynos4210_init(get_system_memory(),
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exynos4_board_ram_size[board_type]);
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}
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static void nuri_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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{
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exynos4_boards_init_common(kernel_filename, kernel_cmdline,
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initrd_filename, EXYNOS4_BOARD_NURI);
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arm_load_kernel(first_cpu, &exynos4_board_binfo);
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}
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static void smdkc210_init(ram_addr_t ram_size,
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const char *boot_device,
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const char *kernel_filename, const char *kernel_cmdline,
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const char *initrd_filename, const char *cpu_model)
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{
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Exynos4210State *s = exynos4_boards_init_common(kernel_filename,
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kernel_cmdline, initrd_filename, EXYNOS4_BOARD_SMDKC210);
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lan9215_init(SMDK_LAN9118_BASE_ADDR,
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qemu_irq_invert(s->irq_table[exynos4210_get_irq(37, 1)]));
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arm_load_kernel(first_cpu, &exynos4_board_binfo);
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}
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static QEMUMachine exynos4_machines[EXYNOS4_NUM_OF_BOARDS] = {
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[EXYNOS4_BOARD_NURI] = {
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.name = "nuri",
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.desc = "Samsung NURI board (Exynos4210)",
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.init = nuri_init,
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.max_cpus = EXYNOS4210_NCPUS,
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},
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[EXYNOS4_BOARD_SMDKC210] = {
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.name = "smdkc210",
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.desc = "Samsung SMDKC210 board (Exynos4210)",
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.init = smdkc210_init,
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.max_cpus = EXYNOS4210_NCPUS,
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},
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};
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static void exynos4_machine_init(void)
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{
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qemu_register_machine(&exynos4_machines[EXYNOS4_BOARD_NURI]);
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qemu_register_machine(&exynos4_machines[EXYNOS4_BOARD_SMDKC210]);
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}
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machine_init(exynos4_machine_init);
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