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2507c12ab0
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
151 lines
4.1 KiB
C
151 lines
4.1 KiB
C
/*
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* Syborg RTC
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*
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* Copyright (c) 2008 CodeSourcery
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "sysbus.h"
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#include "qemu-timer.h"
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#include "syborg.h"
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enum {
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RTC_ID = 0,
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RTC_LATCH = 1,
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RTC_DATA_LOW = 2,
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RTC_DATA_HIGH = 3
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};
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typedef struct {
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SysBusDevice busdev;
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int64_t offset;
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int64_t data;
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qemu_irq irq;
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} SyborgRTCState;
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static uint32_t syborg_rtc_read(void *opaque, target_phys_addr_t offset)
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{
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SyborgRTCState *s = (SyborgRTCState *)opaque;
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offset &= 0xfff;
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switch (offset >> 2) {
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case RTC_ID:
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return SYBORG_ID_RTC;
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case RTC_DATA_LOW:
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return (uint32_t)s->data;
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case RTC_DATA_HIGH:
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return (uint32_t)(s->data >> 32);
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default:
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cpu_abort(cpu_single_env, "syborg_rtc_read: Bad offset %x\n",
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(int)offset);
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return 0;
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}
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}
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static void syborg_rtc_write(void *opaque, target_phys_addr_t offset, uint32_t value)
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{
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SyborgRTCState *s = (SyborgRTCState *)opaque;
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uint64_t now;
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offset &= 0xfff;
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switch (offset >> 2) {
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case RTC_LATCH:
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now = qemu_get_clock(vm_clock);
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if (value >= 4) {
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s->offset = s->data - now;
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} else {
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s->data = now + s->offset;
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while (value) {
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s->data /= 1000;
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value--;
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}
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}
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break;
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case RTC_DATA_LOW:
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s->data = (s->data & ~(uint64_t)0xffffffffu) | value;
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break;
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case RTC_DATA_HIGH:
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s->data = (s->data & 0xffffffffu) | ((uint64_t)value << 32);
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break;
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default:
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cpu_abort(cpu_single_env, "syborg_rtc_write: Bad offset %x\n",
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(int)offset);
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break;
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}
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}
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static CPUReadMemoryFunc * const syborg_rtc_readfn[] = {
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syborg_rtc_read,
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syborg_rtc_read,
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syborg_rtc_read
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};
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static CPUWriteMemoryFunc * const syborg_rtc_writefn[] = {
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syborg_rtc_write,
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syborg_rtc_write,
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syborg_rtc_write
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};
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static void syborg_rtc_save(QEMUFile *f, void *opaque)
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{
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SyborgRTCState *s = opaque;
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qemu_put_be64(f, s->offset);
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qemu_put_be64(f, s->data);
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}
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static int syborg_rtc_load(QEMUFile *f, void *opaque, int version_id)
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{
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SyborgRTCState *s = opaque;
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if (version_id != 1)
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return -EINVAL;
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s->offset = qemu_get_be64(f);
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s->data = qemu_get_be64(f);
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return 0;
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}
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static int syborg_rtc_init(SysBusDevice *dev)
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{
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SyborgRTCState *s = FROM_SYSBUS(SyborgRTCState, dev);
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struct tm tm;
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int iomemtype;
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iomemtype = cpu_register_io_memory(syborg_rtc_readfn,
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syborg_rtc_writefn, s,
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DEVICE_NATIVE_ENDIAN);
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sysbus_init_mmio(dev, 0x1000, iomemtype);
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qemu_get_timedate(&tm, 0);
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s->offset = (uint64_t)mktime(&tm) * 1000000000;
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register_savevm(&dev->qdev, "syborg_rtc", -1, 1,
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syborg_rtc_save, syborg_rtc_load, s);
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return 0;
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}
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static void syborg_rtc_register_devices(void)
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{
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sysbus_register_dev("syborg,rtc", sizeof(SyborgRTCState), syborg_rtc_init);
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}
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device_init(syborg_rtc_register_devices)
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