Peter Maydell dbd9e08476 target/arm: Advertise MVE to gdb when present ... Cortex-M CPUs with MVE should advertise this fact to gdb, using the org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR register. Presence of this feature also tells gdb to create pseudo-registers Q0..Q7, so we do not need to tell gdb about them separately. Note that unless you have a very recent GDB that includes this fix: http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the individual fields of the VPR register as zero (but showing the whole thing as hex, eg with "print /x $vpr" will give the correct value). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2021-11-02 14:14:55 -04:00
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aarch64-core.xml
aarch64-fpu.xml
arm-core.xml
arm-m-profile-mve.xml	target/arm: Advertise MVE to gdb when present	2021-11-02 14:14:55 -04:00
arm-m-profile.xml
arm-neon.xml	target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML	2021-09-30 13:42:10 +01:00
arm-vfp3.xml	target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML	2021-09-30 13:42:10 +01:00
arm-vfp-sysregs.xml	target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML	2021-09-30 13:42:10 +01:00
arm-vfp.xml	target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML	2021-09-30 13:42:10 +01:00
avr-cpu.xml
cf-core.xml
cf-fp.xml
i386-32bit.xml
i386-64bit.xml
m68k-core.xml
m68k-fp.xml
power64-core.xml
power-altivec.xml
power-core.xml
power-fpu.xml
power-spe.xml
power-vsx.xml
riscv-32bit-cpu.xml
riscv-32bit-fpu.xml
riscv-32bit-virtual.xml
riscv-64bit-cpu.xml
riscv-64bit-fpu.xml
riscv-64bit-virtual.xml
rx-core.xml
s390-acr.xml
s390-cr.xml
s390-fpr.xml
s390-gs.xml
s390-virt.xml
s390-vx.xml
s390x-core64.xml