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ce189ab230
All remaining conversions to qdev_realize() are for bus-less devices.
Coccinelle script:
// only correct for bus-less @dev!
@@
expression errp;
expression dev;
@@
- qdev_init_nofail(dev);
+ qdev_realize(dev, NULL, &error_fatal);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(OBJECT(dev), true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
@ depends on !(file in "hw/core/qdev.c") && !(file in "hw/core/bus.c")@
expression errp;
expression dev;
symbol true;
@@
- object_property_set_bool(dev, true, "realized", errp);
+ qdev_realize(DEVICE(dev), NULL, errp);
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-57-armbru@redhat.com>
144 lines
4.6 KiB
C
144 lines
4.6 KiB
C
/*
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* KZM Board System emulation.
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*
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* Copyright (c) 2008 OKL and 2011 NICTA
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* Written by Hans at OK-Labs
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* Updated by Peter Chubb.
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*
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* This code is licensed under the GPL, version 2 or later.
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* See the file `COPYING' in the top level directory.
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*
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* It (partially) emulates a Kyoto Microcomputer
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* KZM-ARM11-01 evaluation board, with a Freescale
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* i.MX31 SoC
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "cpu.h"
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#include "hw/arm/fsl-imx31.h"
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#include "hw/boards.h"
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#include "qemu/error-report.h"
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#include "exec/address-spaces.h"
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#include "net/net.h"
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#include "hw/net/lan9118.h"
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#include "hw/char/serial.h"
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#include "sysemu/qtest.h"
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#include "sysemu/sysemu.h"
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#include "qemu/cutils.h"
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/* Memory map for Kzm Emulation Baseboard:
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* 0x00000000-0x7fffffff See i.MX31 SOC for support
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* 0x80000000-0x8fffffff RAM EMULATED
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* 0x90000000-0x9fffffff RAM EMULATED
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* 0xa0000000-0xafffffff Flash IGNORED
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* 0xb0000000-0xb3ffffff Unavailable IGNORED
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* 0xb4000000-0xb4000fff 8-bit free space IGNORED
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* 0xb4001000-0xb400100f Board control IGNORED
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* 0xb4001003 DIP switch
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* 0xb4001010-0xb400101f 7-segment LED IGNORED
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* 0xb4001020-0xb400102f LED IGNORED
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* 0xb4001030-0xb400103f LED IGNORED
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* 0xb4001040-0xb400104f FPGA, UART EMULATED
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* 0xb4001050-0xb400105f FPGA, UART EMULATED
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* 0xb4001060-0xb40fffff FPGA IGNORED
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* 0xb6000000-0xb61fffff LAN controller EMULATED
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* 0xb6200000-0xb62fffff FPGA NAND Controller IGNORED
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* 0xb6300000-0xb7ffffff Free IGNORED
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* 0xb8000000-0xb8004fff Memory control registers IGNORED
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* 0xc0000000-0xc3ffffff PCMCIA/CF IGNORED
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* 0xc4000000-0xffffffff Reserved IGNORED
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*/
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typedef struct IMX31KZM {
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FslIMX31State soc;
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MemoryRegion ram_alias;
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} IMX31KZM;
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#define KZM_RAM_ADDR (FSL_IMX31_SDRAM0_ADDR)
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#define KZM_FPGA_ADDR (FSL_IMX31_CS4_ADDR + 0x1040)
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#define KZM_LAN9118_ADDR (FSL_IMX31_CS5_ADDR)
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static struct arm_boot_info kzm_binfo = {
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.loader_start = KZM_RAM_ADDR,
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.board_id = 1722,
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};
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static void kzm_init(MachineState *machine)
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{
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IMX31KZM *s = g_new0(IMX31KZM, 1);
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unsigned int ram_size;
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unsigned int alias_offset;
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unsigned int i;
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object_initialize_child(OBJECT(machine), "soc", &s->soc, TYPE_FSL_IMX31);
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qdev_realize(DEVICE(&s->soc), NULL, &error_fatal);
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/* Check the amount of memory is compatible with the SOC */
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if (machine->ram_size > (FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE)) {
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char *sz = size_to_str(FSL_IMX31_SDRAM0_SIZE + FSL_IMX31_SDRAM1_SIZE);
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error_report("RAM size more than %s is not supported", sz);
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g_free(sz);
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exit(EXIT_FAILURE);
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}
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memory_region_add_subregion(get_system_memory(), FSL_IMX31_SDRAM0_ADDR,
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machine->ram);
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/* initialize the alias memory if any */
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for (i = 0, ram_size = machine->ram_size, alias_offset = 0;
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(i < 2) && ram_size; i++) {
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unsigned int size;
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static const struct {
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hwaddr addr;
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unsigned int size;
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} ram[2] = {
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{ FSL_IMX31_SDRAM0_ADDR, FSL_IMX31_SDRAM0_SIZE },
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{ FSL_IMX31_SDRAM1_ADDR, FSL_IMX31_SDRAM1_SIZE },
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};
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size = MIN(ram_size, ram[i].size);
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ram_size -= size;
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if (size < ram[i].size) {
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memory_region_init_alias(&s->ram_alias, NULL, "ram.alias",
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machine->ram,
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alias_offset, ram[i].size - size);
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memory_region_add_subregion(get_system_memory(),
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ram[i].addr + size, &s->ram_alias);
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}
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alias_offset += ram[i].size;
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}
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if (nd_table[0].used) {
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lan9118_init(&nd_table[0], KZM_LAN9118_ADDR,
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qdev_get_gpio_in(DEVICE(&s->soc.avic), 52));
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}
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if (serial_hd(2)) { /* touchscreen */
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serial_mm_init(get_system_memory(), KZM_FPGA_ADDR+0x10, 0,
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qdev_get_gpio_in(DEVICE(&s->soc.avic), 52),
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14745600, serial_hd(2), DEVICE_NATIVE_ENDIAN);
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}
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kzm_binfo.ram_size = machine->ram_size;
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kzm_binfo.nb_cpus = 1;
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if (!qtest_enabled()) {
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arm_load_kernel(&s->soc.cpu, machine, &kzm_binfo);
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}
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}
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static void kzm_machine_init(MachineClass *mc)
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{
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mc->desc = "ARM KZM Emulation Baseboard (ARM1136)";
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mc->init = kzm_init;
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mc->ignore_memory_transaction_failures = true;
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mc->default_ram_id = "kzm.ram";
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}
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DEFINE_MACHINE("kzm", kzm_machine_init)
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