xemu/target/arm
Igor Mammedov ba1ba5cca3 arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directly
there are 2 use cases to deal with:
  1: fixed CPU models per board/soc
  2: boards with user configurable cpu_model and fallback to
     default cpu_model if user hasn't specified one explicitly

For the 1st
  drop intermediate cpu_model parsing and use const cpu type
  directly, which replaces:
     typename = object_class_get_name(
           cpu_class_by_name(TYPE_ARM_CPU, cpu_model))
     object_new(typename)
  with
     object_new(FOO_CPU_TYPE_NAME)
  or
     cpu_generic_init(BASE_CPU_TYPE, "my cpu model")
  with
     cpu_create(FOO_CPU_TYPE_NAME)

as result 1st use case doesn't have to invoke not necessary
translation and not needed code is removed.

For the 2nd
 1: set default cpu type with MachineClass::default_cpu_type and
 2: use generic cpu_model parsing that done before machine_init()
    is run and:
    2.1: drop custom cpu_model parsing where pattern is:
       typename = object_class_get_name(
           cpu_class_by_name(TYPE_ARM_CPU, cpu_model))
       [parse_features(typename, cpu_model, &err) ]

    2.2: or replace cpu_generic_init() which does what
         2.1 does + create_cpu(typename) with just
         create_cpu(machine->cpu_type)
as result cpu_name -> cpu_type translation is done using
generic machine code one including parsing optional features
if supported/present (removes a bunch of duplicated cpu_model
parsing code) and default cpu type is defined in an uniform way
within machine_class_init callbacks instead of adhoc places
in boadr's machine_init code.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <1505318697-77161-6-git-send-email-imammedo@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-09-19 09:09:32 -03:00
..
arch_dump.c hmp: fix "dump-quest-memory" segfault (arm) 2017-09-14 15:52:10 +01:00
arm_ldst.h Fix Thumb-1 BE32 execution and disassembly. 2017-02-07 18:29:59 +00:00
arm-powerctl.c target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-powerctl.h target-arm/powerctl: defer cpu reset work to CPU context 2017-02-24 10:32:46 +00:00
arm-semi.c
cpu64.c target-arm: Enable EL2 feature bit on A53 and A57 2017-01-20 11:15:10 +00:00
cpu-qom.h
cpu.c arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directly 2017-09-19 09:09:32 -03:00
cpu.h arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directly 2017-09-19 09:09:32 -03:00
crypto_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper-a64.h target-arm: Use clrsb helper 2017-01-10 08:47:48 -08:00
helper.c target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit() 2017-09-14 18:43:17 +01:00
helper.h target/arm: Implement BXNS, and banked stack pointers 2017-09-07 13:54:54 +01:00
internals.h target/arm: Add and use defines for EXCRET constants 2017-09-14 18:43:17 +01:00
iwmmxt_helper.c
kvm32.c target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
kvm64.c target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
kvm_arm.h target/arm/kvm: pmu: improve error handling 2017-09-04 15:21:54 +01:00
kvm-consts.h arm: add trailing ; after MISMATCH_CHECK 2017-02-01 03:37:18 +02:00
kvm-stub.c
kvm.c hw/arm/virt: allow pmu instantiation with userspace irqchip 2017-09-04 15:21:54 +01:00
machine.c target/arm: Implement BXNS, and banked stack pointers 2017-09-07 13:54:54 +01:00
Makefile.objs
monitor.c
neon_helper.c
op_addsub.h
op_helper.c target/arm: Clear exclusive monitor on v7M reset, exception entry/exit 2017-09-14 18:43:16 +01:00
psci.c shutdown: Add source information to SHUTDOWN and RESET 2017-05-23 13:28:17 +02:00
trace-events trace-events: fix code style: print 0x before hex numbers 2017-08-01 12:13:07 +01:00
translate-a64.c target/arm: Avoid an extra temporary for store_exclusive 2017-09-14 18:43:18 +01:00
translate.c target-arm: 2017-09-07 16:46:15 +01:00
translate.h target-arm: 2017-09-07 16:46:15 +01:00