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2c3e83f92d
- ePMP CSR address updates - Convert internal interrupts to use QEMU GPIO lines - SiFive PWM support - Support for RISC-V ACLINT - SiFive PDMA fixes - Update to u-boot instructions for sifive_u - mstatus.SD bug fix for hypervisor extensions - OpenTitan fix for USB dev address -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAmFJgSoACgkQIeENKd+X cFQTOwf8DC7rBqOWQS3v/r+H2hlfDqW+4G3pPPBcoyCEiqO+cL26ox+EmTHDbieh +0yWyp7L6SU/zcJ86oBAFNGH46ltXuUKOYWhkfA1QwlGzAwjZ82hnZ3jJqXf1jin Wq0ElzKk6rvcRkHTVhdjkGvoxskaXPQ/kFzyTHrxMDlkmHO3L4IaYe0xsamRI11D E7UJC97YmpSAsCNUc5irpkeLyiFobyR8TEL3nBEPK/6Xj0ojRT4zoGe1EotC7+sN zL8a9ZuU0bL3rQH8Ai7wnXBP8D2PQa0tZQV6wne/BzeEUSpKrC/rGW73vQCz0Pps U8VNkIlbAqD1s6aXlqE24H535x10Mw== =WYF5 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-20210921' into staging Second RISC-V PR for QEMU 6.2 - ePMP CSR address updates - Convert internal interrupts to use QEMU GPIO lines - SiFive PWM support - Support for RISC-V ACLINT - SiFive PDMA fixes - Update to u-boot instructions for sifive_u - mstatus.SD bug fix for hypervisor extensions - OpenTitan fix for USB dev address # gpg: Signature made Mon 20 Sep 2021 11:52:26 PM PDT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair23/tags/pull-riscv-to-apply-20210921: (21 commits) hw/riscv: opentitan: Correct the USB Dev address target/riscv: csr: Rename HCOUNTEREN_CY and friends target/riscv: Backup/restore mstatus.SD bit when virtual register swapped docs/system/riscv: sifive_u: Update U-Boot instructions hw/dma: sifive_pdma: don't set Control.error if 0 bytes to transfer hw/dma: sifive_pdma: allow non-multiple transaction size transactions hw/dma: sifive_pdma: claim bit must be set before DMA transactions hw/dma: sifive_pdma: reset Next* registers when Control.claim is set hw/riscv: virt: Add optional ACLINT support to virt machine hw/riscv: virt: Re-factor FDT generation hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT hw/intc: Rename sifive_clint sources to riscv_aclint sources sifive_u: Connect the SiFive PWM device hw/timer: Add SiFive PWM support hw/intc: ibex_timer: Convert the timer to use RISC-V CPU GPIO lines hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines hw/intc: ibex_plic: Convert the PLIC to use RISC-V CPU GPIO lines hw/intc: sifive_clint: Use RISC-V CPU GPIO lines target/riscv: Expose interrupt pending bits as GPIO lines target/riscv: Fix satp write ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| .. | ||
| allwinner-a10-pic.c | ||
| apic_common.c | ||
| apic.c | ||
| arm_gic_common.c | ||
| arm_gic_kvm.c | ||
| arm_gic.c | ||
| arm_gicv2m.c | ||
| arm_gicv3_common.c | ||
| arm_gicv3_cpuif.c | ||
| arm_gicv3_dist.c | ||
| arm_gicv3_its_common.c | ||
| arm_gicv3_its_kvm.c | ||
| arm_gicv3_its.c | ||
| arm_gicv3_kvm.c | ||
| arm_gicv3_redist.c | ||
| arm_gicv3.c | ||
| armv7m_nvic.c | ||
| aspeed_vic.c | ||
| bcm2835_ic.c | ||
| bcm2836_control.c | ||
| etraxfs_pic.c | ||
| exynos4210_combiner.c | ||
| exynos4210_gic.c | ||
| gic_internal.h | ||
| gicv3_internal.h | ||
| goldfish_pic.c | ||
| grlib_irqmp.c | ||
| heathrow_pic.c | ||
| i8259_common.c | ||
| i8259.c | ||
| ibex_plic.c | ||
| imx_avic.c | ||
| imx_gpcv2.c | ||
| intc.c | ||
| ioapic_common.c | ||
| ioapic.c | ||
| Kconfig | ||
| loongson_liointc.c | ||
| m68k_irqc.c | ||
| meson.build | ||
| mips_gic.c | ||
| omap_intc.c | ||
| ompic.c | ||
| openpic_kvm.c | ||
| openpic.c | ||
| pl190.c | ||
| pnv_xive_regs.h | ||
| pnv_xive.c | ||
| ppc-uic.c | ||
| realview_gic.c | ||
| riscv_aclint.c | ||
| rx_icu.c | ||
| s390_flic_kvm.c | ||
| s390_flic.c | ||
| sh_intc.c | ||
| sifive_plic.c | ||
| slavio_intctl.c | ||
| spapr_xive_kvm.c | ||
| spapr_xive.c | ||
| trace-events | ||
| trace.h | ||
| vgic_common.h | ||
| xics_kvm.c | ||
| xics_pnv.c | ||
| xics_spapr.c | ||
| xics.c | ||
| xilinx_intc.c | ||
| xive.c | ||
| xlnx-pmu-iomod-intc.c | ||
| xlnx-zynqmp-ipi.c | ||