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75fe83564a
This new behaviour is in the ARM pseudocode function AArch64.CheckFPAdvSIMDEnabled, which applies to AArch32 via AArch32.CheckAdvSIMDOrFPEnabled when the EL to which the trap would be delivered is in AArch64 mode. Given that ARMv9 drops support for AArch32 outside EL0, the trap EL detection ought to be trivially true, but the pseudocode still contains a number of conditions, and QEMU has not yet committed to dropping A32 support for EL[12] when v9 features are present. Since the computation of SME_TRAP_NONSTREAMING is necessarily different for the two modes, we might as well preserve bits within TBFLAG_ANY and allocate separate bits within TBFLAG_A32 and TBFLAG_A64 instead. Note that DDI0616A.a has typos for bits [22:21] of LD1RO in the table of instructions illegal in streaming mode. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220708151540.18136-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
72 lines
2.1 KiB
Meson
72 lines
2.1 KiB
Meson
gen = [
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decodetree.process('sve.decode', extra_args: '--decode=disas_sve'),
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decodetree.process('sme.decode', extra_args: '--decode=disas_sme'),
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decodetree.process('sme-fa64.decode', extra_args: '--static-decode=disas_sme_fa64'),
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decodetree.process('neon-shared.decode', extra_args: '--decode=disas_neon_shared'),
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decodetree.process('neon-dp.decode', extra_args: '--decode=disas_neon_dp'),
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decodetree.process('neon-ls.decode', extra_args: '--decode=disas_neon_ls'),
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decodetree.process('vfp.decode', extra_args: '--decode=disas_vfp'),
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decodetree.process('vfp-uncond.decode', extra_args: '--decode=disas_vfp_uncond'),
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decodetree.process('m-nocp.decode', extra_args: '--decode=disas_m_nocp'),
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decodetree.process('mve.decode', extra_args: '--decode=disas_mve'),
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decodetree.process('a32.decode', extra_args: '--static-decode=disas_a32'),
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decodetree.process('a32-uncond.decode', extra_args: '--static-decode=disas_a32_uncond'),
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decodetree.process('t32.decode', extra_args: '--static-decode=disas_t32'),
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decodetree.process('t16.decode', extra_args: ['-w', '16', '--static-decode=disas_t16']),
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]
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arm_ss = ss.source_set()
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arm_ss.add(gen)
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arm_ss.add(files(
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'cpu.c',
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'crypto_helper.c',
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'debug_helper.c',
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'gdbstub.c',
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'helper.c',
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'iwmmxt_helper.c',
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'm_helper.c',
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'mve_helper.c',
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'neon_helper.c',
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'op_helper.c',
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'tlb_helper.c',
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'translate.c',
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'translate-m-nocp.c',
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'translate-mve.c',
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'translate-neon.c',
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'translate-vfp.c',
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'vec_helper.c',
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'vfp_helper.c',
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'cpu_tcg.c',
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))
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arm_ss.add(zlib)
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arm_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c', 'kvm64.c'), if_false: files('kvm-stub.c'))
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arm_ss.add(when: 'TARGET_AARCH64', if_true: files(
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'cpu64.c',
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'gdbstub64.c',
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'helper-a64.c',
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'mte_helper.c',
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'pauth_helper.c',
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'sve_helper.c',
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'sme_helper.c',
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'translate-a64.c',
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'translate-sve.c',
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'translate-sme.c',
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))
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arm_softmmu_ss = ss.source_set()
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arm_softmmu_ss.add(files(
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'arch_dump.c',
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'arm-powerctl.c',
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'machine.c',
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'monitor.c',
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'psci.c',
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'ptw.c',
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))
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subdir('hvf')
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target_arch += {'arm': arm_ss}
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target_softmmu_arch += {'arm': arm_softmmu_ss}
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