Peter Maydell 5acc270a35 target/xtensa fixes for 5.1: ... - fix access to special registers missing in the core configuration; - fix simcall opcode behavior for new hardware; - drop gen_io_end call from xtensa translator. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEK2eFS5jlMn3N6xfYUfnMkfg/oEQFAl70W5oTHGpjbXZia2Jj QGdtYWlsLmNvbQAKCRBR+cyR+D+gRMpVD/9GLB9XOAZf1acFl4zR8RDqECn+Gm+E PH+ddhPPm2BqhOf7kMEl9MwPD+nBGhhXCINmIVWKcSH+5AAyquBPaNG3J8mJUgGG oJIuViPEZCeG9vPLdlzry/hNgxlkOBMUA5W7x6T+8bNUc/TSV88IOgUnC++djkxu ghkwyx29WyHH5HpQFaOoxTuZgkQa0gkc5z+lvWj2BMLVmv8z0kub4FdFh4bFJJP5 2VzBYPT9eDgyHg0Wp66ugtLr71haeJA5eKctqa6MO3XVYhmOfdkkogj25eXUwyz/ JVBMFWWbI60aQR95uPLYVSrfeUKiRHrVbi5ypFzc7Fws0b8wVGAQOuwocgIvYVK+ blQYYAvL1kJD57BOpsMFWtjdCZ8PICWGOjBzVat1elZIPPq7qbEzCh4JSfM1aqMh i4tBmid6fJOykGZNGGDryb+7KL+30SLofHrdxgQv5fzQxxf0tnHhzf5/ACx9lTRw ni2OnTS0P8SLFDJ6PT1Bb7dQUUvgOEnb9vdEt8KUkiNI+UA12fWrc6V8YHe2VeJN utXDyXWOKvkgktC0heb4PdDJDQ1Y3jVoixsqU17Xrk0ZOjQwsg+hKzR2EnMfJJPz c39tO9dLnx0Dx84Wumcnn8DZn70ksRMrhptmznPgWoIjj5Mwrhyrq+aT+atyGuSc XHRarOeKKuSq5w== =qFHa -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/xtensa/tags/20200625-xtensa' into staging target/xtensa fixes for 5.1: - fix access to special registers missing in the core configuration; - fix simcall opcode behavior for new hardware; - drop gen_io_end call from xtensa translator. # gpg: Signature made Thu 25 Jun 2020 09:08:58 BST # gpg: using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044 # gpg: issuer "jcmvbkbc@gmail.com" # gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown] # gpg: aka "Max Filippov <max.filippov@cogentembedded.com>" [full] # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" [full] # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20200625-xtensa: target/xtensa: drop gen_io_end call target/xtensa: fix simcall for newer hardware target/xtensa: fetch HW version from configuration overlay target/xtensa: work around missing SR definitions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2020-06-25 21:20:45 +01:00
..
core-dc232b
core-dc233c
core-de212
core-fsf
core-sample_controller
core-test_kc705_be
core-test_mmuhifi_c3
core-dc232b.c
core-dc233c.c
core-de212.c
core-fsf.c
core-sample_controller.c
core-test_kc705_be.c
core-test_mmuhifi_c3.c
cpu-param.h
cpu-qom.h	cpu: Use DeviceClass reset instead of a special CPUClass reset	2020-03-17 19:48:10 -04:00
cpu.c	cpu: Use DeviceClass reset instead of a special CPUClass reset	2020-03-17 19:48:10 -04:00
cpu.h	target/xtensa: fetch HW version from configuration overlay	2020-05-17 14:52:25 -07:00
dbg_helper.c
exc_helper.c
fpu_helper.c	softfloat: Name compare relation enum	2020-05-19 08:41:45 -07:00
gdbstub.c	gdbstub: Do not use memset() on GByteArray	2020-04-15 11:38:23 +01:00
helper.c	target/xtensa: statically allocate xtensa_insnbufs in DisasContext	2020-04-07 16:08:11 -07:00
helper.h
import_core.sh
Makefile.objs
mmu_helper.c
monitor.c
op_helper.c
overlay_tool.h	target/xtensa: fetch HW version from configuration overlay	2020-05-17 14:52:25 -07:00
translate.c	target/xtensa: drop gen_io_end call	2020-06-22 03:38:30 -07:00
win_helper.c
xtensa-isa-internal.h
xtensa-isa.c
xtensa-isa.h
xtensa-semi.c