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Before we launch a guest we query KVM for the list of "co-processor" registers it knows about. This is used to synchronize system register state for the bulk of coprocessor/system registers. Move this code from the 32-bit specific vcpu init function into a common routine and call it also from the 64-bit vcpu init. This allows system registers to migrate correctly when using KVM, and also permits QEMU code to see the current KVM register state (which will be needed to support big-endian guests, since the virtio endianness callback must check for some system register settings). Since vcpu reset also has to sync registers, we move the 32 bit kvm_arm_reset_vcpu() into common code as well and share it with the 64 bit version. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> [PMM: just copy the 32-bit code rather than improving it along the way; don't share reg_syncs_via_tuple_list() between 32 and 64 bit; tweak function names; move reset] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
168 lines
5.2 KiB
C
168 lines
5.2 KiB
C
/*
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* QEMU KVM support -- ARM specific functions.
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*
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* Copyright (c) 2012 Linaro Limited
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#ifndef QEMU_KVM_ARM_H
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#define QEMU_KVM_ARM_H
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#include "sysemu/kvm.h"
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#include "exec/memory.h"
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/**
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* kvm_arm_vcpu_init:
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* @cs: CPUState
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*
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* Initialize (or reinitialize) the VCPU by invoking the
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* KVM_ARM_VCPU_INIT ioctl with the CPU type and feature
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* bitmask specified in the CPUState.
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*
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* Returns: 0 if success else < 0 error code
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*/
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int kvm_arm_vcpu_init(CPUState *cs);
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/**
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* kvm_arm_register_device:
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* @mr: memory region for this device
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* @devid: the KVM device ID
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* @group: device control API group for setting addresses
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* @attr: device control API address type
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* @dev_fd: device control device file descriptor (or -1 if not supported)
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*
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* Remember the memory region @mr, and when it is mapped by the
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* machine model, tell the kernel that base address using the
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* KVM_ARM_SET_DEVICE_ADDRESS ioctl or the newer device control API. @devid
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* should be the ID of the device as defined by KVM_ARM_SET_DEVICE_ADDRESS or
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* the arm-vgic device in the device control API.
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* The machine model may map
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* and unmap the device multiple times; the kernel will only be told the final
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* address at the point where machine init is complete.
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*/
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void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
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uint64_t attr, int dev_fd);
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/**
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* kvm_arm_init_cpreg_list:
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* @cs: CPUState
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*
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* Initialize the CPUState's cpreg list according to the kernel's
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* definition of what CPU registers it knows about (and throw away
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* the previous TCG-created cpreg list).
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*
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* Returns: 0 if success, else < 0 error code
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*/
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int kvm_arm_init_cpreg_list(ARMCPU *cpu);
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/**
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* kvm_arm_reg_syncs_via_cpreg_list
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* regidx: KVM register index
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*
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* Return true if this KVM register should be synchronized via the
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* cpreg list of arbitrary system registers, false if it is synchronized
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* by hand using code in kvm_arch_get/put_registers().
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*/
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bool kvm_arm_reg_syncs_via_cpreg_list(uint64_t regidx);
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/**
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* write_list_to_kvmstate:
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* @cpu: ARMCPU
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*
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* For each register listed in the ARMCPU cpreg_indexes list, write
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* its value from the cpreg_values list into the kernel (via ioctl).
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* This updates KVM's working data structures from TCG data or
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* from incoming migration state.
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*
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* Returns: true if all register values were updated correctly,
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* false if some register was unknown to the kernel or could not
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* be written (eg constant register with the wrong value).
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* Note that we do not stop early on failure -- we will attempt
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* writing all registers in the list.
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*/
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bool write_list_to_kvmstate(ARMCPU *cpu);
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/**
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* write_kvmstate_to_list:
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* @cpu: ARMCPU
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*
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* For each register listed in the ARMCPU cpreg_indexes list, write
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* its value from the kernel into the cpreg_values list. This is used to
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* copy info from KVM's working data structures into TCG or
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* for outbound migration.
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*
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* Returns: true if all register values were read correctly,
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* false if some register was unknown or could not be read.
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* Note that we do not stop early on failure -- we will attempt
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* reading all registers in the list.
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*/
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bool write_kvmstate_to_list(ARMCPU *cpu);
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/**
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* kvm_arm_reset_vcpu:
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* @cpu: ARMCPU
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*
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* Called at reset time to kernel registers to their initial values.
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*/
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void kvm_arm_reset_vcpu(ARMCPU *cpu);
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#ifdef CONFIG_KVM
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/**
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* kvm_arm_create_scratch_host_vcpu:
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* @cpus_to_try: array of QEMU_KVM_ARM_TARGET_* values (terminated with
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* QEMU_KVM_ARM_TARGET_NONE) to try as fallback if the kernel does not
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* know the PREFERRED_TARGET ioctl
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* @fdarray: filled in with kvmfd, vmfd, cpufd file descriptors in that order
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* @init: filled in with the necessary values for creating a host vcpu
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*
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* Create a scratch vcpu in its own VM of the type preferred by the host
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* kernel (as would be used for '-cpu host'), for purposes of probing it
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* for capabilities.
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*
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* Returns: true on success (and fdarray and init are filled in),
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* false on failure (and fdarray and init are not valid).
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*/
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bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
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int *fdarray,
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struct kvm_vcpu_init *init);
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/**
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* kvm_arm_destroy_scratch_host_vcpu:
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* @fdarray: array of fds as set up by kvm_arm_create_scratch_host_vcpu
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*
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* Tear down the scratch vcpu created by kvm_arm_create_scratch_host_vcpu.
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*/
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void kvm_arm_destroy_scratch_host_vcpu(int *fdarray);
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#define TYPE_ARM_HOST_CPU "host-" TYPE_ARM_CPU
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#define ARM_HOST_CPU_CLASS(klass) \
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OBJECT_CLASS_CHECK(ARMHostCPUClass, (klass), TYPE_ARM_HOST_CPU)
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#define ARM_HOST_CPU_GET_CLASS(obj) \
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OBJECT_GET_CLASS(ARMHostCPUClass, (obj), TYPE_ARM_HOST_CPU)
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typedef struct ARMHostCPUClass {
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/*< private >*/
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ARMCPUClass parent_class;
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/*< public >*/
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uint64_t features;
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uint32_t target;
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const char *dtb_compatible;
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} ARMHostCPUClass;
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/**
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* kvm_arm_get_host_cpu_features:
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* @ahcc: ARMHostCPUClass to fill in
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*
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* Probe the capabilities of the host kernel's preferred CPU and fill
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* in the ARMHostCPUClass struct accordingly.
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*/
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bool kvm_arm_get_host_cpu_features(ARMHostCPUClass *ahcc);
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#endif
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#endif
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