Daniel Henrique Barboza 719b718ce2 hw/riscv: set machine->fdt in spike_board_init() ...

This will enable support for the 'dumpdtb' QMP/HMP command for the spike
machine.

Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Alistair Francis <alistair.francis@wdc.com>
Cc: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220926173855.1159396-16-danielhb413@gmail.com>

2022-10-17 16:15:10 -03:00

..

boot.c

hw/riscv: virt: Enable booting S-mode firmware from pflash

2022-10-14 14:29:50 +10:00

Kconfig

hw/riscv: Enable TPM backends

2022-04-29 10:48:48 +10:00

meson.build

hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines

2021-07-20 15:32:49 +02:00

microchip_pfsoc.c

hw/riscv: microchip_pfsoc: fix kernel panics due to missing peripherals

2022-09-07 09:18:33 +02:00

numa.c

hw: Do not include qemu/log.h if it is not necessary

2021-05-02 17:24:50 +02:00

opentitan.c

hw/riscv: opentitan: Expose the resetvec as a SoC property

2022-09-27 07:04:38 +10:00

riscv_hart.c

hw/riscv: hart: Add a new 'resetvec' property

2020-09-09 15:54:18 -07:00

shakti_c.c

hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()

2022-09-07 09:18:33 +02:00

sifive_e.c

hw/riscv: Make CPU config error handling generous (sifive_e/u/opentitan)

2022-05-24 10:38:50 +10:00

sifive_u.c

hw/riscv: set machine->fdt in sifive_u_machine_init()

2022-10-17 16:15:10 -03:00

spike.c

hw/riscv: set machine->fdt in spike_board_init()

2022-10-17 16:15:10 -03:00

virt.c

hw/riscv: virt: Enable booting S-mode firmware from pflash

2022-10-14 14:29:50 +10:00