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7162ab21fe
According to the Intel manual "Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3", "3.4.4 Segment Loading Instructions in IA-32e Mode": "When in compatibility mode, FS and GS overrides operate as defined by 32-bit mode behavior regardless of the value loaded into the upper 32 linear-address bits of the hidden descriptor register base field. Compatibility mode ignores the upper 32 bits when calculating an effective address." However, the code misses the 64-bit mode case, where an instruction with address and segment size override would be translated incorrectly. For example, inc dword ptr gs:260h[ebx*4] gets incorrectly translated to: (uint32_t)(gs.base + ebx * 4 + 0x260) instead of gs.base + (uint32_t)(ebx * 4 + 0x260) Signed-off-by: Vitaly Chipounov <vitaly.chipounov@epfl.ch> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> |
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| .. | ||
| arch_dump.c | ||
| arch_memory_mapping.c | ||
| cc_helper_template.h | ||
| cc_helper.c | ||
| cpu-qom.h | ||
| cpu.c | ||
| cpu.h | ||
| excp_helper.c | ||
| fpu_helper.c | ||
| helper.c | ||
| helper.h | ||
| hyperv.c | ||
| hyperv.h | ||
| int_helper.c | ||
| ioport-user.c | ||
| kvm.c | ||
| machine.c | ||
| Makefile.objs | ||
| mem_helper.c | ||
| misc_helper.c | ||
| ops_sse_header.h | ||
| ops_sse.h | ||
| seg_helper.c | ||
| shift_helper_template.h | ||
| smm_helper.c | ||
| svm_helper.c | ||
| svm.h | ||
| TODO | ||
| translate.c | ||