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c227f0995e
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b72.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
226 lines
7.7 KiB
C
226 lines
7.7 KiB
C
/*
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* QEMU internal VGA defines.
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#define MSR_COLOR_EMULATION 0x01
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#define MSR_PAGE_SELECT 0x20
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#define ST01_V_RETRACE 0x08
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#define ST01_DISP_ENABLE 0x01
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/* bochs VBE support */
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#define CONFIG_BOCHS_VBE
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#define VBE_DISPI_MAX_XRES 1600
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#define VBE_DISPI_MAX_YRES 1200
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#define VBE_DISPI_MAX_BPP 32
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#define VBE_DISPI_INDEX_ID 0x0
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#define VBE_DISPI_INDEX_XRES 0x1
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#define VBE_DISPI_INDEX_YRES 0x2
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#define VBE_DISPI_INDEX_BPP 0x3
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#define VBE_DISPI_INDEX_ENABLE 0x4
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#define VBE_DISPI_INDEX_BANK 0x5
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#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
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#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
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#define VBE_DISPI_INDEX_X_OFFSET 0x8
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#define VBE_DISPI_INDEX_Y_OFFSET 0x9
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#define VBE_DISPI_INDEX_NB 0xa
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#define VBE_DISPI_ID0 0xB0C0
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#define VBE_DISPI_ID1 0xB0C1
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#define VBE_DISPI_ID2 0xB0C2
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#define VBE_DISPI_ID3 0xB0C3
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#define VBE_DISPI_ID4 0xB0C4
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#define VBE_DISPI_DISABLED 0x00
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#define VBE_DISPI_ENABLED 0x01
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#define VBE_DISPI_GETCAPS 0x02
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#define VBE_DISPI_8BIT_DAC 0x20
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#define VBE_DISPI_LFB_ENABLED 0x40
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#define VBE_DISPI_NOCLEARMEM 0x80
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#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
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#ifdef CONFIG_BOCHS_VBE
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#define VGA_STATE_COMMON_BOCHS_VBE \
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uint16_t vbe_index; \
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uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
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uint32_t vbe_start_addr; \
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uint32_t vbe_line_offset; \
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uint32_t vbe_bank_mask;
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#else
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#define VGA_STATE_COMMON_BOCHS_VBE
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#endif /* !CONFIG_BOCHS_VBE */
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#define CH_ATTR_SIZE (160 * 100)
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#define VGA_MAX_HEIGHT 2048
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struct vga_precise_retrace {
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int64_t ticks_per_char;
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int64_t total_chars;
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int htotal;
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int hstart;
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int hend;
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int vstart;
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int vend;
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int freq;
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};
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union vga_retrace {
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struct vga_precise_retrace precise;
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};
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struct VGACommonState;
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typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
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typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
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typedef struct VGACommonState {
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uint8_t *vram_ptr;
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ram_addr_t vram_offset;
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unsigned int vram_size;
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uint32_t lfb_addr;
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uint32_t lfb_end;
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uint32_t map_addr;
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uint32_t map_end;
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uint32_t lfb_vram_mapped; /* whether 0xa0000 is mapped as ram */
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uint32_t bios_offset;
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uint32_t bios_size;
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uint32_t latch;
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uint8_t sr_index;
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uint8_t sr[256];
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uint8_t gr_index;
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uint8_t gr[256];
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uint8_t ar_index;
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uint8_t ar[21];
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int ar_flip_flop;
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uint8_t cr_index;
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uint8_t cr[256]; /* CRT registers */
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uint8_t msr; /* Misc Output Register */
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uint8_t fcr; /* Feature Control Register */
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uint8_t st00; /* status 0 */
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uint8_t st01; /* status 1 */
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uint8_t dac_state;
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uint8_t dac_sub_index;
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uint8_t dac_read_index;
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uint8_t dac_write_index;
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uint8_t dac_cache[3]; /* used when writing */
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int dac_8bit;
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uint8_t palette[768];
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int32_t bank_offset;
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int vga_io_memory;
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int (*get_bpp)(struct VGACommonState *s);
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void (*get_offsets)(struct VGACommonState *s,
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uint32_t *pline_offset,
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uint32_t *pstart_addr,
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uint32_t *pline_compare);
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void (*get_resolution)(struct VGACommonState *s,
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int *pwidth,
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int *pheight);
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VGA_STATE_COMMON_BOCHS_VBE
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/* display refresh support */
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DisplayState *ds;
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uint32_t font_offsets[2];
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int graphic_mode;
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uint8_t shift_control;
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uint8_t double_scan;
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uint32_t line_offset;
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uint32_t line_compare;
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uint32_t start_addr;
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uint32_t plane_updated;
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uint32_t last_line_offset;
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uint8_t last_cw, last_ch;
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uint32_t last_width, last_height; /* in chars or pixels */
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uint32_t last_scr_width, last_scr_height; /* in pixels */
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uint32_t last_depth; /* in bits */
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uint8_t full_update;
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uint8_t cursor_start, cursor_end;
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uint32_t cursor_offset;
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unsigned int (*rgb_to_pixel)(unsigned int r,
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unsigned int g, unsigned b);
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vga_hw_update_ptr update;
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vga_hw_invalidate_ptr invalidate;
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vga_hw_screen_dump_ptr screen_dump;
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vga_hw_text_update_ptr text_update;
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/* hardware mouse cursor support */
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uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
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void (*cursor_invalidate)(struct VGACommonState *s);
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void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
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/* tell for each page if it has been updated since the last time */
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uint32_t last_palette[256];
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uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
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/* retrace */
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vga_retrace_fn retrace;
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vga_update_retrace_info_fn update_retrace_info;
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union vga_retrace retrace_info;
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} VGACommonState;
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static inline int c6_to_8(int v)
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{
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int b;
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v &= 0x3f;
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b = v & 1;
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return (v << 2) | (b << 1) | b;
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}
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void vga_common_init(VGACommonState *s, int vga_ram_size);
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void vga_init(VGACommonState *s);
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void vga_common_reset(VGACommonState *s);
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void vga_dirty_log_start(VGACommonState *s);
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void vga_common_save(QEMUFile *f, void *opaque);
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int vga_common_load(QEMUFile *f, void *opaque, int version_id);
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uint32_t vga_ioport_read(void *opaque, uint32_t addr);
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void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
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uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
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void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
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void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
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int ppm_save(const char *filename, struct DisplaySurface *ds);
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void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
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int poffset, int w,
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unsigned int color0, unsigned int color1,
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unsigned int color_xor);
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void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
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int poffset, int w,
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unsigned int color0, unsigned int color1,
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unsigned int color_xor);
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void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
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int poffset, int w,
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unsigned int color0, unsigned int color1,
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unsigned int color_xor);
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int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
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extern const uint8_t sr_mask[8];
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extern const uint8_t gr_mask[16];
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#define VGA_RAM_SIZE (8192 * 1024)
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extern CPUReadMemoryFunc * const vga_mem_read[3];
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extern CPUWriteMemoryFunc * const vga_mem_write[3];
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