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3c3c1e3203
Delay the host-bridge 'realization' until the PCI root bus is attached. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
170 lines
5.4 KiB
C
170 lines
5.4 KiB
C
/*
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* QEMU Grackle PCI host (heathrow OldWorld PowerMac)
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*
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* Copyright (c) 2006-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "hw/pci/pci_host.h"
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#include "hw/ppc/mac.h"
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#include "hw/pci/pci.h"
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/* debug Grackle */
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//#define DEBUG_GRACKLE
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#ifdef DEBUG_GRACKLE
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#define GRACKLE_DPRINTF(fmt, ...) \
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do { printf("GRACKLE: " fmt , ## __VA_ARGS__); } while (0)
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#else
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#define GRACKLE_DPRINTF(fmt, ...)
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#endif
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#define GRACKLE_PCI_HOST_BRIDGE(obj) \
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OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE)
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typedef struct GrackleState {
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PCIHostState parent_obj;
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MemoryRegion pci_mmio;
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MemoryRegion pci_hole;
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} GrackleState;
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/* Don't know if this matches real hardware, but it agrees with OHW. */
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static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
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{
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return (irq_num + (pci_dev->devfn >> 3)) & 3;
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}
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static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
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{
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qemu_irq *pic = opaque;
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GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level);
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qemu_set_irq(pic[irq_num + 0x15], level);
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}
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PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io)
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{
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DeviceState *dev;
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SysBusDevice *s;
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PCIHostState *phb;
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GrackleState *d;
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dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
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s = SYS_BUS_DEVICE(dev);
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phb = PCI_HOST_BRIDGE(dev);
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d = GRACKLE_PCI_HOST_BRIDGE(dev);
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memory_region_init(&d->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
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memory_region_init_alias(&d->pci_hole, OBJECT(s), "pci-hole", &d->pci_mmio,
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0x80000000ULL, 0x7e000000ULL);
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memory_region_add_subregion(address_space_mem, 0x80000000ULL,
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&d->pci_hole);
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phb->bus = pci_register_bus(dev, NULL,
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pci_grackle_set_irq,
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pci_grackle_map_irq,
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pic,
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&d->pci_mmio,
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address_space_io,
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0, 4, TYPE_PCI_BUS);
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pci_create_simple(phb->bus, 0, "grackle");
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qdev_init_nofail(dev);
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sysbus_mmio_map(s, 0, base);
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sysbus_mmio_map(s, 1, base + 0x00200000);
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return phb->bus;
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}
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static int pci_grackle_init_device(SysBusDevice *dev)
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{
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PCIHostState *phb;
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phb = PCI_HOST_BRIDGE(dev);
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memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
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dev, "pci-conf-idx", 0x1000);
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memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
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dev, "pci-data-idx", 0x1000);
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sysbus_init_mmio(dev, &phb->conf_mem);
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sysbus_init_mmio(dev, &phb->data_mem);
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return 0;
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}
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static void grackle_pci_host_realize(PCIDevice *d, Error **errp)
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{
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d->config[0x09] = 0x01;
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}
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static void grackle_pci_class_init(ObjectClass *klass, void *data)
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{
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PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->realize = grackle_pci_host_realize;
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k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
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k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
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k->revision = 0x00;
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k->class_id = PCI_CLASS_BRIDGE_HOST;
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/*
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* PCI-facing part of the host bridge, not usable without the
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* host-facing part, which can't be device_add'ed, yet.
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*/
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dc->cannot_instantiate_with_device_add_yet = true;
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}
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static const TypeInfo grackle_pci_info = {
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.name = "grackle",
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.parent = TYPE_PCI_DEVICE,
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.instance_size = sizeof(PCIDevice),
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.class_init = grackle_pci_class_init,
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};
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static void pci_grackle_class_init(ObjectClass *klass, void *data)
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{
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->init = pci_grackle_init_device;
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set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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}
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static const TypeInfo grackle_pci_host_info = {
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.name = TYPE_GRACKLE_PCI_HOST_BRIDGE,
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.parent = TYPE_PCI_HOST_BRIDGE,
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.instance_size = sizeof(GrackleState),
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.class_init = pci_grackle_class_init,
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};
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static void grackle_register_types(void)
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{
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type_register_static(&grackle_pci_info);
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type_register_static(&grackle_pci_host_info);
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}
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type_init(grackle_register_types)
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