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da10a9074a
In preparation for implementing multiple sizes. Rename to parts_addsub, split out parts_add/sub_normal for future reuse with muladd. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
365 lines
10 KiB
C++
365 lines
10 KiB
C++
/*
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* QEMU float support
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*
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* The code in this source file is derived from release 2a of the SoftFloat
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* IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
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* some later contributions) are provided under that license, as detailed below.
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* It has subsequently been modified by contributors to the QEMU Project,
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* so some portions are provided under:
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* the SoftFloat-2a license
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* the BSD license
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* GPL-v2-or-later
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*
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* Any future contributions to this file after December 1st 2014 will be
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* taken to be licensed under the Softfloat-2a license unless specifically
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* indicated otherwise.
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*/
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static void partsN(return_nan)(FloatPartsN *a, float_status *s)
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{
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switch (a->cls) {
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case float_class_snan:
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float_raise(float_flag_invalid, s);
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if (s->default_nan_mode) {
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parts_default_nan(a, s);
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} else {
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parts_silence_nan(a, s);
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}
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break;
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case float_class_qnan:
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if (s->default_nan_mode) {
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parts_default_nan(a, s);
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}
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break;
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default:
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g_assert_not_reached();
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}
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}
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static FloatPartsN *partsN(pick_nan)(FloatPartsN *a, FloatPartsN *b,
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float_status *s)
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{
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if (is_snan(a->cls) || is_snan(b->cls)) {
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float_raise(float_flag_invalid, s);
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}
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if (s->default_nan_mode) {
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parts_default_nan(a, s);
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} else {
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int cmp = frac_cmp(a, b);
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if (cmp == 0) {
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cmp = a->sign < b->sign;
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}
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if (pickNaN(a->cls, b->cls, cmp > 0, s)) {
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a = b;
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}
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if (is_snan(a->cls)) {
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parts_silence_nan(a, s);
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}
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}
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return a;
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}
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static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN *a, FloatPartsN *b,
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FloatPartsN *c, float_status *s,
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int ab_mask, int abc_mask)
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{
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int which;
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if (unlikely(abc_mask & float_cmask_snan)) {
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float_raise(float_flag_invalid, s);
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}
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which = pickNaNMulAdd(a->cls, b->cls, c->cls,
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ab_mask == float_cmask_infzero, s);
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if (s->default_nan_mode || which == 3) {
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/*
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* Note that this check is after pickNaNMulAdd so that function
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* has an opportunity to set the Invalid flag for infzero.
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*/
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parts_default_nan(a, s);
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return a;
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}
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switch (which) {
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case 0:
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break;
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case 1:
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a = b;
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break;
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case 2:
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a = c;
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break;
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default:
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g_assert_not_reached();
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}
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if (is_snan(a->cls)) {
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parts_silence_nan(a, s);
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}
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return a;
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}
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/*
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* Canonicalize the FloatParts structure. Determine the class,
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* unbias the exponent, and normalize the fraction.
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*/
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static void partsN(canonicalize)(FloatPartsN *p, float_status *status,
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const FloatFmt *fmt)
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{
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if (unlikely(p->exp == 0)) {
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if (likely(frac_eqz(p))) {
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p->cls = float_class_zero;
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} else if (status->flush_inputs_to_zero) {
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float_raise(float_flag_input_denormal, status);
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p->cls = float_class_zero;
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frac_clear(p);
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} else {
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int shift = frac_normalize(p);
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p->cls = float_class_normal;
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p->exp = fmt->frac_shift - fmt->exp_bias - shift + 1;
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}
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} else if (likely(p->exp < fmt->exp_max) || fmt->arm_althp) {
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p->cls = float_class_normal;
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p->exp -= fmt->exp_bias;
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frac_shl(p, fmt->frac_shift);
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p->frac_hi |= DECOMPOSED_IMPLICIT_BIT;
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} else if (likely(frac_eqz(p))) {
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p->cls = float_class_inf;
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} else {
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frac_shl(p, fmt->frac_shift);
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p->cls = (parts_is_snan_frac(p->frac_hi, status)
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? float_class_snan : float_class_qnan);
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}
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}
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/*
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* Round and uncanonicalize a floating-point number by parts. There
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* are FRAC_SHIFT bits that may require rounding at the bottom of the
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* fraction; these bits will be removed. The exponent will be biased
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* by EXP_BIAS and must be bounded by [EXP_MAX-1, 0].
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*/
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static void partsN(uncanon)(FloatPartsN *p, float_status *s,
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const FloatFmt *fmt)
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{
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const int exp_max = fmt->exp_max;
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const int frac_shift = fmt->frac_shift;
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const uint64_t frac_lsb = fmt->frac_lsb;
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const uint64_t frac_lsbm1 = fmt->frac_lsbm1;
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const uint64_t round_mask = fmt->round_mask;
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const uint64_t roundeven_mask = fmt->roundeven_mask;
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uint64_t inc;
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bool overflow_norm;
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int exp, flags = 0;
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if (unlikely(p->cls != float_class_normal)) {
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switch (p->cls) {
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case float_class_zero:
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p->exp = 0;
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frac_clear(p);
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return;
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case float_class_inf:
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g_assert(!fmt->arm_althp);
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p->exp = fmt->exp_max;
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frac_clear(p);
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return;
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case float_class_qnan:
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case float_class_snan:
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g_assert(!fmt->arm_althp);
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p->exp = fmt->exp_max;
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frac_shr(p, fmt->frac_shift);
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return;
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default:
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break;
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}
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g_assert_not_reached();
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}
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switch (s->float_rounding_mode) {
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case float_round_nearest_even:
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overflow_norm = false;
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inc = ((p->frac_lo & roundeven_mask) != frac_lsbm1 ? frac_lsbm1 : 0);
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break;
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case float_round_ties_away:
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overflow_norm = false;
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inc = frac_lsbm1;
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break;
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case float_round_to_zero:
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overflow_norm = true;
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inc = 0;
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break;
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case float_round_up:
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inc = p->sign ? 0 : round_mask;
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overflow_norm = p->sign;
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break;
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case float_round_down:
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inc = p->sign ? round_mask : 0;
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overflow_norm = !p->sign;
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break;
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case float_round_to_odd:
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overflow_norm = true;
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inc = p->frac_lo & frac_lsb ? 0 : round_mask;
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break;
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default:
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g_assert_not_reached();
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}
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exp = p->exp + fmt->exp_bias;
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if (likely(exp > 0)) {
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if (p->frac_lo & round_mask) {
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flags |= float_flag_inexact;
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if (frac_addi(p, p, inc)) {
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frac_shr(p, 1);
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p->frac_hi |= DECOMPOSED_IMPLICIT_BIT;
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exp++;
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}
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}
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frac_shr(p, frac_shift);
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if (fmt->arm_althp) {
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/* ARM Alt HP eschews Inf and NaN for a wider exponent. */
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if (unlikely(exp > exp_max)) {
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/* Overflow. Return the maximum normal. */
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flags = float_flag_invalid;
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exp = exp_max;
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frac_allones(p);
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}
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} else if (unlikely(exp >= exp_max)) {
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flags |= float_flag_overflow | float_flag_inexact;
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if (overflow_norm) {
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exp = exp_max - 1;
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frac_allones(p);
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} else {
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p->cls = float_class_inf;
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exp = exp_max;
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frac_clear(p);
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}
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}
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} else if (s->flush_to_zero) {
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flags |= float_flag_output_denormal;
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p->cls = float_class_zero;
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exp = 0;
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frac_clear(p);
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} else {
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bool is_tiny = s->tininess_before_rounding || exp < 0;
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if (!is_tiny) {
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FloatPartsN discard;
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is_tiny = !frac_addi(&discard, p, inc);
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}
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frac_shrjam(p, 1 - exp);
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if (p->frac_lo & round_mask) {
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/* Need to recompute round-to-even/round-to-odd. */
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switch (s->float_rounding_mode) {
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case float_round_nearest_even:
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inc = ((p->frac_lo & roundeven_mask) != frac_lsbm1
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? frac_lsbm1 : 0);
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break;
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case float_round_to_odd:
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inc = p->frac_lo & frac_lsb ? 0 : round_mask;
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break;
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default:
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break;
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}
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flags |= float_flag_inexact;
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frac_addi(p, p, inc);
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}
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exp = (p->frac_hi & DECOMPOSED_IMPLICIT_BIT) != 0;
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frac_shr(p, frac_shift);
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if (is_tiny && (flags & float_flag_inexact)) {
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flags |= float_flag_underflow;
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}
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if (exp == 0 && frac_eqz(p)) {
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p->cls = float_class_zero;
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}
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}
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p->exp = exp;
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float_raise(flags, s);
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}
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/*
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* Returns the result of adding or subtracting the values of the
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* floating-point values `a' and `b'. The operation is performed
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* according to the IEC/IEEE Standard for Binary Floating-Point
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* Arithmetic.
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*/
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static FloatPartsN *partsN(addsub)(FloatPartsN *a, FloatPartsN *b,
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float_status *s, bool subtract)
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{
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bool b_sign = b->sign ^ subtract;
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int ab_mask = float_cmask(a->cls) | float_cmask(b->cls);
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if (a->sign != b_sign) {
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/* Subtraction */
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if (likely(ab_mask == float_cmask_normal)) {
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if (parts_sub_normal(a, b)) {
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return a;
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}
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/* Subtract was exact, fall through to set sign. */
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ab_mask = float_cmask_zero;
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}
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if (ab_mask == float_cmask_zero) {
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a->sign = s->float_rounding_mode == float_round_down;
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return a;
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}
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if (unlikely(ab_mask & float_cmask_anynan)) {
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goto p_nan;
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}
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if (ab_mask & float_cmask_inf) {
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if (a->cls != float_class_inf) {
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/* N - Inf */
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goto return_b;
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}
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if (b->cls != float_class_inf) {
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/* Inf - N */
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return a;
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}
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/* Inf - Inf */
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float_raise(float_flag_invalid, s);
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parts_default_nan(a, s);
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return a;
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}
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} else {
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/* Addition */
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if (likely(ab_mask == float_cmask_normal)) {
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parts_add_normal(a, b);
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return a;
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}
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if (ab_mask == float_cmask_zero) {
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return a;
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}
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if (unlikely(ab_mask & float_cmask_anynan)) {
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goto p_nan;
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}
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if (ab_mask & float_cmask_inf) {
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a->cls = float_class_inf;
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return a;
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}
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}
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if (b->cls == float_class_zero) {
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g_assert(a->cls == float_class_normal);
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return a;
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}
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g_assert(a->cls == float_class_zero);
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g_assert(b->cls == float_class_normal);
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return_b:
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b->sign = b_sign;
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return b;
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p_nan:
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return parts_pick_nan(a, b, s);
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}
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