xemu/hw/net
Peter Maydell f00f57f344 This PR includes multiple fixes and features for RISC-V:
- Fixes a bug in printing trap causes
  - Allows 16-bit writes to the SiFive test device. This fixes the
    failure to reboot the RISC-V virt machine
  - Support for the Microchip PolarFire SoC and Icicle Kit
  - A reafactor of RISC-V code out of hw/riscv
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAl9aa4YACgkQIeENKd+X
 cFTJjgf5ASfFIO5HqP1l80/UM5Pswyq0IROZDq0ItZa6U4EPzLXoE2N0POriIj4h
 Ds2JbMg0ORDqY0VbSxHlgYHMgJ9S6cuVOMnATsPG0d2jaJ3gSxLBu5k/1ENqe+Vw
 sSYXZv5uEAUfOFz99zbuhKHct5HzlmBFW9dVHdflUQS+cRgsSXq27mz1BvZ8xMWl
 lMhwubqdoNx0rOD3vKnlwrxaf54DcJ2IQT3BtTCjEar3tukdNaLijAuwt2hrFyr+
 IwpeFXA/NWar+mXP3M+BvcLaI33j73/ac2+S5SJuzHGp/ot5nT5gAuq3PDEjHMeS
 t6z9Exp776VXxNE2iUA5NB65Yp3/6w==
 =07oA
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging

This PR includes multiple fixes and features for RISC-V:
 - Fixes a bug in printing trap causes
 - Allows 16-bit writes to the SiFive test device. This fixes the
   failure to reboot the RISC-V virt machine
 - Support for the Microchip PolarFire SoC and Icicle Kit
 - A reafactor of RISC-V code out of hw/riscv

# gpg: Signature made Thu 10 Sep 2020 19:08:06 BST
# gpg:                using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8  CE8F 21E1 0D29 DF97 7054

* remotes/alistair/tags/pull-riscv-to-apply-20200910: (30 commits)
  hw/riscv: Sort the Kconfig options in alphabetical order
  hw/riscv: Drop CONFIG_SIFIVE
  hw/riscv: Always build riscv_hart.c
  hw/riscv: Move sifive_test model to hw/misc
  hw/riscv: Move sifive_uart model to hw/char
  hw/riscv: Move riscv_htif model to hw/char
  hw/riscv: Move sifive_plic model to hw/intc
  hw/riscv: Move sifive_clint model to hw/intc
  hw/riscv: Move sifive_gpio model to hw/gpio
  hw/riscv: Move sifive_u_otp model to hw/misc
  hw/riscv: Move sifive_u_prci model to hw/misc
  hw/riscv: Move sifive_e_prci model to hw/misc
  hw/riscv: sifive_u: Connect a DMA controller
  hw/riscv: clint: Avoid using hard-coded timebase frequency
  hw/riscv: microchip_pfsoc: Hook GPIO controllers
  hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs
  hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
  hw/net: cadence_gem: Add a new 'phy-addr' property
  hw/riscv: microchip_pfsoc: Connect a DMA controller
  hw/dma: Add SiFive platform DMA controller emulation
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	hw/riscv/trace-events
2020-09-13 20:29:35 +01:00
..
can Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
fsl_etsec trivial patches pull request 20200911 2020-09-12 14:23:15 +01:00
rocker Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
allwinner_emac.c hw/net: Make NetCanReceive() return a boolean 2020-03-31 21:14:35 +08:00
allwinner-sun8i-emac.c hw/net/allwinner-sun8i-emac: Use AddressSpace for DMA transfers 2020-08-28 10:02:45 +01:00
cadence_gem.c hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23 2020-09-09 15:54:18 -07:00
dp8393x.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
e1000_regs.h e1000: Rename the SEC symbol to SEQEC 2017-09-08 08:17:37 +08:00
e1000.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
e1000e_core.c hw/net/e1000e: Remove duplicated write handler for FLSWDATA register 2020-09-10 16:20:49 +02:00
e1000e_core.h hw/net/e1000e_core: Let e1000e_can_receive() return a boolean 2020-03-31 21:14:35 +08:00
e1000e.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
e1000x_common.c Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
e1000x_common.h Supply missing header guards 2019-06-12 13:20:21 +02:00
eepro100.c Drop more @errp parameters after previous commit 2020-05-15 07:08:14 +02:00
etraxfs_eth.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ftgmac100.c ftgmac100: Improve software reset 2020-09-01 14:21:50 +02:00
i82596.c hw/net: Make NetCanReceive() return a boolean 2020-03-31 21:14:35 +08:00
i82596.h hw/net: Make NetCanReceive() return a boolean 2020-03-31 21:14:35 +08:00
imx_fec.c Add a phy-num property to the i.MX FEC emulator 2020-07-03 16:59:41 +01:00
Kconfig hw/arm/allwinner-h3: add EMAC ethernet device 2020-03-12 16:27:33 +00:00
lan9118.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
lance.c Drop more @errp parameters after previous commit 2020-05-15 07:08:14 +02:00
lasi_i82596.c sysbus: Convert to sysbus_realize() etc. with Coccinelle 2020-06-15 22:05:28 +02:00
mcf_fec.c mcf_fec: Move mcf_fec_state typedef to header 2020-08-27 14:04:54 -04:00
meson.build meson: convert hw/net 2020-08-21 06:30:29 -04:00
milkymist-minimac2.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
mipsnet.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
msf2-emac.c hw/net: Add Smartfusion2 emac block 2020-04-30 11:52:28 +01:00
ne2000-isa.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
ne2000-pci.c Drop more @errp parameters after previous commit 2020-05-15 07:08:14 +02:00
ne2000.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00
ne2000.h Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
net_rx_pkt.c NetRxPkt: fix hash calculation of IPV6 TCP 2020-03-03 18:04:47 +08:00
net_rx_pkt.h NetRxPkt: Introduce support for additional hash types 2020-03-03 18:04:47 +08:00
net_tx_pkt.c hw/net/net_tx_pkt: fix assertion failure in net_tx_pkt_add_raw_fragment() 2020-08-04 14:14:48 +08:00
net_tx_pkt.h hw/net: Added plen fix for IPv6 2020-07-21 21:30:39 +08:00
opencores_eth.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
pcnet-pci.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
pcnet.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00
pcnet.h lance: replace PROP_PTR with PROP_LINK 2020-01-07 17:24:29 +04:00
rtl8139.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
smc91c111.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
spapr_llan.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
stellaris_enet.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
sungem.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
sunhme.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
trace-events Add a phy-num property to the i.MX FEC emulator 2020-07-03 16:59:41 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
tulip.c tulip: Move TulipState typedef to header 2020-08-27 14:04:54 -04:00
tulip.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
vhost_net-stub.c vhost_net: introduce set_config & get_config 2020-07-03 07:57:04 -04:00
vhost_net.c vhost-vdpa: introduce vhost-vdpa backend 2020-07-07 07:59:51 -04:00
virtio-net.c hw/net/virtio-net:Remove redundant statement in virtio_net_rsc_tcp_ctrl_check() 2020-09-01 11:59:59 +02:00
vmware_utils.h hw/net/vmxnet3: Fix code to work on big endian hosts, too 2017-11-20 11:08:00 +08:00
vmxnet3_defs.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
vmxnet3.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
vmxnet3.h hw/net/vmxnet3: Fix code to work on big endian hosts, too 2017-11-20 11:08:00 +08:00
vmxnet_debug.h Clean up ill-advised or unusual header guards 2016-07-12 16:20:46 +02:00
xen_nic.c Include hw/hw.h exactly where needed 2019-08-16 13:31:52 +02:00
xgmac.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
xilinx_axienet.c xilinx_axienet: Use typedef name for instance_size 2020-09-09 13:20:22 -04:00
xilinx_ethlite.c Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00