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19f7034773
The address_space_rw() function allows either reads or writes depending on the is_write argument passed to it; this is useful when the direction of the access is determined programmatically (as for instance when handling the KVM_EXIT_MMIO exit reason). Under the hood it just calls either address_space_write() or address_space_read_full(). We also use it a lot with a constant is_write argument, though, which has two issues: * when reading "address_space_rw(..., 1)" this is less immediately clear to the reader as being a write than "address_space_write(...)" * calling address_space_rw() bypasses the optimization in address_space_read() that fast-paths reads of a fixed length This commit was produced with the included Coccinelle script scripts/coccinelle/exec_rw_const.cocci. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-Id: <20200218112457.22712-1-peter.maydell@linaro.org> [PMD: Update macvm_set_cr0() reported by Laurent Vivier] Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
190 lines
5.3 KiB
C
190 lines
5.3 KiB
C
/*
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* QEMU LASI NIC i82596 emulation
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*
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* Copyright (c) 2019 Helge Deller <deller@gmx.de>
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* This work is licensed under the GNU GPL license version 2 or later.
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*
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*
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* On PA-RISC, this is the Network part of LASI chip.
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* See:
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* https://parisc.wiki.kernel.org/images-parisc/7/79/Lasi_ers.pdf
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*/
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#include "qemu/osdep.h"
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#include "qemu/timer.h"
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#include "hw/sysbus.h"
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#include "net/eth.h"
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#include "hw/net/lasi_82596.h"
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#include "hw/net/i82596.h"
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#include "trace.h"
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#include "sysemu/sysemu.h"
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#include "hw/qdev-properties.h"
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#include "migration/vmstate.h"
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#define PA_I82596_RESET 0 /* Offsets relative to LASI-LAN-Addr.*/
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#define PA_CPU_PORT_L_ACCESS 4
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#define PA_CHANNEL_ATTENTION 8
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#define PA_GET_MACADDR 12
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#define SWAP32(x) (((uint32_t)(x) << 16) | ((((uint32_t)(x))) >> 16))
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static void lasi_82596_mem_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned size)
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{
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SysBusI82596State *d = opaque;
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trace_lasi_82596_mem_writew(addr, val);
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switch (addr) {
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case PA_I82596_RESET:
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i82596_h_reset(&d->state);
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break;
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case PA_CPU_PORT_L_ACCESS:
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d->val_index++;
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if (d->val_index == 0) {
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uint32_t v = d->last_val | (val << 16);
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v = v & ~0xff;
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i82596_ioport_writew(&d->state, d->last_val & 0xff, v);
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}
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d->last_val = val;
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break;
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case PA_CHANNEL_ATTENTION:
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i82596_ioport_writew(&d->state, PORT_CA, val);
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break;
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case PA_GET_MACADDR:
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/*
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* Provided for SeaBIOS only. Write MAC of Network card to addr @val.
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* Needed for the PDC_LAN_STATION_ID_READ PDC call.
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*/
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address_space_write(&address_space_memory, val,
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MEMTXATTRS_UNSPECIFIED, d->state.conf.macaddr.a,
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ETH_ALEN);
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break;
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}
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}
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static uint64_t lasi_82596_mem_read(void *opaque, hwaddr addr,
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unsigned size)
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{
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SysBusI82596State *d = opaque;
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uint32_t val;
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if (addr == PA_GET_MACADDR) {
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val = 0xBEEFBABE;
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} else {
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val = i82596_ioport_readw(&d->state, addr);
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}
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trace_lasi_82596_mem_readw(addr, val);
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return val;
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}
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static const MemoryRegionOps lasi_82596_mem_ops = {
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.read = lasi_82596_mem_read,
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.write = lasi_82596_mem_write,
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.endianness = DEVICE_BIG_ENDIAN,
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.valid = {
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.min_access_size = 4,
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.max_access_size = 4,
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},
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};
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static NetClientInfo net_lasi_82596_info = {
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.type = NET_CLIENT_DRIVER_NIC,
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.size = sizeof(NICState),
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.can_receive = i82596_can_receive,
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.receive = i82596_receive,
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.link_status_changed = i82596_set_link_status,
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};
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static const VMStateDescription vmstate_lasi_82596 = {
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.name = "i82596",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_STRUCT(state, SysBusI82596State, 0, vmstate_i82596,
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I82596State),
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VMSTATE_END_OF_LIST()
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}
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};
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static void lasi_82596_realize(DeviceState *dev, Error **errp)
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{
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SysBusI82596State *d = SYSBUS_I82596(dev);
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I82596State *s = &d->state;
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memory_region_init_io(&s->mmio, OBJECT(d), &lasi_82596_mem_ops, d,
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"lasi_82596-mmio", PA_GET_MACADDR + 4);
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i82596_common_init(dev, s, &net_lasi_82596_info);
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}
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SysBusI82596State *lasi_82596_init(MemoryRegion *addr_space,
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hwaddr hpa, qemu_irq lan_irq)
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{
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DeviceState *dev;
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SysBusI82596State *s;
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static const MACAddr HP_MAC = {
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.a = { 0x08, 0x00, 0x09, 0xef, 0x34, 0xf6 } };
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qemu_check_nic_model(&nd_table[0], TYPE_LASI_82596);
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dev = qdev_create(NULL, TYPE_LASI_82596);
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s = SYSBUS_I82596(dev);
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s->state.irq = lan_irq;
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qdev_set_nic_properties(dev, &nd_table[0]);
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qdev_init_nofail(dev);
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s->state.conf.macaddr = HP_MAC; /* set HP MAC prefix */
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/* LASI 82596 ports in main memory. */
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memory_region_add_subregion(addr_space, hpa, &s->state.mmio);
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return s;
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}
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static void lasi_82596_reset(DeviceState *dev)
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{
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SysBusI82596State *d = SYSBUS_I82596(dev);
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i82596_h_reset(&d->state);
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}
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static void lasi_82596_instance_init(Object *obj)
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{
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SysBusI82596State *d = SYSBUS_I82596(obj);
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I82596State *s = &d->state;
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device_add_bootindex_property(obj, &s->conf.bootindex,
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"bootindex", "/ethernet-phy@0",
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DEVICE(obj), NULL);
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}
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static Property lasi_82596_properties[] = {
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DEFINE_NIC_PROPERTIES(SysBusI82596State, state.conf),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void lasi_82596_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = lasi_82596_realize;
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set_bit(DEVICE_CATEGORY_NETWORK, dc->categories);
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dc->fw_name = "ethernet";
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dc->reset = lasi_82596_reset;
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dc->vmsd = &vmstate_lasi_82596;
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dc->user_creatable = false;
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device_class_set_props(dc, lasi_82596_properties);
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}
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static const TypeInfo lasi_82596_info = {
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.name = TYPE_LASI_82596,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(SysBusI82596State),
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.class_init = lasi_82596_class_init,
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.instance_init = lasi_82596_instance_init,
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};
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static void lasi_82596_register_types(void)
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{
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type_register_static(&lasi_82596_info);
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}
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type_init(lasi_82596_register_types)
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