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21f3f8db0e
On POWER9, the Client Architecture Support (CAS) negotiation process determines whether the guest operates in XIVE Legacy compatibility or in XIVE exploitation mode. Now that we have initial guest support for the XIVE interrupt controller, let's fix the bits definition which have evolved in the latest specs. The platform advertises the XIVE Exploitation Mode support using the property "ibm,arch-vec-5-platform-support-vec-5", byte 23 bits 0-1 : - 0b00 XIVE legacy mode Only - 0b01 XIVE exploitation mode Only - 0b10 XIVE legacy or exploitation mode The OS asks for XIVE Exploitation Mode support using the property "ibm,architecture-vec-5", byte 23 bits 0-1: - 0b00 XIVE legacy mode Only - 0b01 XIVE exploitation mode Only Signed-off-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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| .. | ||
| fdt.h | ||
| mac_dbdma.h | ||
| openpic.h | ||
| pnv_core.h | ||
| pnv_lpc.h | ||
| pnv_occ.h | ||
| pnv_psi.h | ||
| pnv_xscom.h | ||
| pnv.h | ||
| ppc4xx.h | ||
| ppc_e500.h | ||
| ppc.h | ||
| spapr_cpu_core.h | ||
| spapr_drc.h | ||
| spapr_ovec.h | ||
| spapr_rtas.h | ||
| spapr_vio.h | ||
| spapr.h | ||
| xics.h | ||