Aurelien Jarno 51127181cf target-mips: optimize ddiv/ddivu/div/divu with movcond ... The result of a division by 0, or a division of INT_MIN by -1 in the signed case, is unpredictable. Just replace 0 by 1 in that case so that it doesn't trigger a floating point exception on the host. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>		2012-10-31 22:20:48 +01:00
..
cpu-qom.h	target-mips: QOM'ify CPU	2012-04-30 11:32:13 +02:00
cpu.c	target-mips: Start QOM'ifying CPU init	2012-04-30 11:32:13 +02:00
cpu.h	target-mips: Add ASE DSP resources access check	2012-10-31 20:24:06 +01:00
dsp_helper.c	target-mips: Add ASE DSP accumulator instructions	2012-10-31 21:37:20 +01:00
helper.c	target-mips: Add ASE DSP resources access check	2012-10-31 20:24:06 +01:00
helper.h	target-mips: implement unaligned loads using TCG	2012-10-31 22:20:47 +01:00
lmi_helper.c	target-mips: Implement Loongson Multimedia Instructions	2012-09-19 21:40:48 +02:00
machine.c	target-mips: Don't overuse CPUState	2012-03-14 22:20:25 +01:00
Makefile.objs	target-mips: Add ASE DSP internal functions	2012-10-31 20:24:05 +01:00
mips-defs.h
op_helper.c	target-mips: implement unaligned loads using TCG	2012-10-31 22:20:47 +01:00
TODO	target-mips: Change TODO file	2012-10-31 21:37:24 +01:00
translate_init.c	target-mips: Add ASE DSP processors	2012-10-31 21:37:20 +01:00
translate.c	target-mips: optimize ddiv/ddivu/div/divu with movcond	2012-10-31 22:20:48 +01:00