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49865b9014
Change the allwinner-h3 based board to use the new boot.c functionality to allow us to enable psci-conduit only if the guest is being booted in EL1 or EL2, so that if the user runs guest EL3 firmware code our PSCI emulation doesn't get in its way. To do this we stop setting the psci-conduit property on the CPU objects in the SoC code, and instead set the psci_conduit field in the arm_boot_info struct to tell the common boot loader code that we'd like PSCI if the guest is starting at an EL that it makes sense with. This affects the orangepi-pc board. This commit leaves the secondary CPUs in the powered-down state if the guest is booting at EL3, which is the same behaviour as before this commit. The secondaries can no longer be started by that EL3 code making a PSCI call but can still be started via the CPU Configuration Module registers (which we model in hw/misc/allwinner-cpucfg.c). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Tested-by: Cédric Le Goater <clg@kaod.org> Tested-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20220127154639.2090164-6-peter.maydell@linaro.org
127 lines
4.3 KiB
C
127 lines
4.3 KiB
C
/*
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* Orange Pi emulation
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*
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* Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "exec/address-spaces.h"
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#include "qapi/error.h"
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#include "hw/boards.h"
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#include "hw/qdev-properties.h"
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#include "hw/arm/allwinner-h3.h"
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static struct arm_boot_info orangepi_binfo = {
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.nb_cpus = AW_H3_NUM_CPUS,
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};
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static void orangepi_init(MachineState *machine)
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{
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AwH3State *h3;
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DriveInfo *di;
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BlockBackend *blk;
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BusState *bus;
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DeviceState *carddev;
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/* BIOS is not supported by this board */
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if (machine->firmware) {
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error_report("BIOS not supported for this machine");
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exit(1);
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}
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/* This board has fixed size RAM */
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if (machine->ram_size != 1 * GiB) {
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error_report("This machine can only be used with 1GiB of RAM");
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exit(1);
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}
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/* Only allow Cortex-A7 for this board */
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if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) {
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error_report("This board can only be used with cortex-a7 CPU");
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exit(1);
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}
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h3 = AW_H3(object_new(TYPE_AW_H3));
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object_property_add_child(OBJECT(machine), "soc", OBJECT(h3));
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object_unref(OBJECT(h3));
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/* Setup timer properties */
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object_property_set_int(OBJECT(h3), "clk0-freq", 32768, &error_abort);
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object_property_set_int(OBJECT(h3), "clk1-freq", 24 * 1000 * 1000,
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&error_abort);
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/* Setup SID properties. Currently using a default fixed SID identifier. */
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if (qemu_uuid_is_null(&h3->sid.identifier)) {
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qdev_prop_set_string(DEVICE(h3), "identifier",
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"02c00081-1111-2222-3333-000044556677");
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} else if (ldl_be_p(&h3->sid.identifier.data[0]) != 0x02c00081) {
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warn_report("Security Identifier value does not include H3 prefix");
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}
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/* Setup EMAC properties */
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object_property_set_int(OBJECT(&h3->emac), "phy-addr", 1, &error_abort);
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/* DRAMC */
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object_property_set_uint(OBJECT(h3), "ram-addr", h3->memmap[AW_H3_DEV_SDRAM],
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&error_abort);
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object_property_set_int(OBJECT(h3), "ram-size", machine->ram_size / MiB,
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&error_abort);
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/* Mark H3 object realized */
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qdev_realize(DEVICE(h3), NULL, &error_abort);
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/* Retrieve SD bus */
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di = drive_get(IF_SD, 0, 0);
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blk = di ? blk_by_legacy_dinfo(di) : NULL;
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bus = qdev_get_child_bus(DEVICE(h3), "sd-bus");
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/* Plug in SD card */
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carddev = qdev_new(TYPE_SD_CARD);
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qdev_prop_set_drive_err(carddev, "drive", blk, &error_fatal);
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qdev_realize_and_unref(carddev, bus, &error_fatal);
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/* SDRAM */
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memory_region_add_subregion(get_system_memory(), h3->memmap[AW_H3_DEV_SDRAM],
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machine->ram);
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/* Load target kernel or start using BootROM */
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if (!machine->kernel_filename && blk && blk_is_available(blk)) {
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/* Use Boot ROM to copy data from SD card to SRAM */
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allwinner_h3_bootrom_setup(h3, blk);
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}
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orangepi_binfo.loader_start = h3->memmap[AW_H3_DEV_SDRAM];
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orangepi_binfo.ram_size = machine->ram_size;
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orangepi_binfo.psci_conduit = QEMU_PSCI_CONDUIT_SMC;
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arm_load_kernel(ARM_CPU(first_cpu), machine, &orangepi_binfo);
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}
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static void orangepi_machine_init(MachineClass *mc)
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{
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mc->desc = "Orange Pi PC (Cortex-A7)";
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mc->init = orangepi_init;
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mc->block_default_type = IF_SD;
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mc->units_per_default_bus = 1;
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mc->min_cpus = AW_H3_NUM_CPUS;
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mc->max_cpus = AW_H3_NUM_CPUS;
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mc->default_cpus = AW_H3_NUM_CPUS;
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mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
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mc->default_ram_size = 1 * GiB;
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mc->default_ram_id = "orangepi.ram";
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}
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DEFINE_MACHINE("orangepi-pc", orangepi_machine_init)
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