Bin Meng 58303fc0be hw/riscv: Don't add empty bootargs to device tree ...

Commit 7c28f4da20e5 ("RISC-V: Don't add NULL bootargs to device-tree")
tried to avoid adding *NULL* bootargs to device tree, but unfortunately
the changes were entirely useless, due to MachineState::kernel_cmdline
can't be NULL at all as the default value is given as an empty string.
(see hw/core/machine.c::machine_initfn()).

Note the wording of *NULL* bootargs is wrong. It can't be NULL otherwise
a segfault had already been observed by dereferencing the NULL pointer.
It should be worded as *empty" bootargs.

Fixes: 7c28f4da20e5 ("RISC-V: Don't add NULL bootargs to device-tree")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220421055629.1177285-2-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

2022-04-29 10:47:45 +10:00

..

boot.c

hw/riscv: boot: Support 64bit fdt address.

2022-04-22 10:35:16 +10:00

Kconfig

hw/riscv: virt: Add optional AIA IMSIC support to virt machine

2022-03-03 13:14:50 +10:00

meson.build

hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines

2021-07-20 15:32:49 +02:00

microchip_pfsoc.c

hw/riscv: Don't add empty bootargs to device tree

2022-04-29 10:47:45 +10:00

numa.c

hw: Do not include qemu/log.h if it is not necessary

2021-05-02 17:24:50 +02:00

opentitan.c

riscv: opentitan: Connect opentitan SPI Host

2022-04-22 10:35:16 +10:00

riscv_hart.c

hw/riscv: hart: Add a new 'resetvec' property

2020-09-09 15:54:18 -07:00

shakti_c.c

hw/riscv: shakti_c: Use MachineState::ram and MachineClass::default_ram_id

2021-10-22 23:35:47 +10:00

sifive_e.c

hw/riscv: Use error_fatal for SoC realisation

2022-01-08 15:46:09 +10:00

sifive_u.c

hw/riscv: Don't add empty bootargs to device tree

2022-04-29 10:47:45 +10:00

spike.c

hw/riscv: Don't add empty bootargs to device tree

2022-04-29 10:47:45 +10:00

virt.c

hw/riscv: Don't add empty bootargs to device tree

2022-04-29 10:47:45 +10:00