Richard Henderson 5862579473 target/i386: Reduce DisasContext popl_esp_hack and rip_offset to uint8_t ...

Both of these fields store the size of a single memory access,
so the range of values is 0-8.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210514151342.384376-25-richard.henderson@linaro.org>

2021-05-19 12:15:47 -05:00

..

alpha

target/alpha: fix icount handling for timer instructions

2021-04-05 07:32:56 -07:00

arm

target/arm: Make WFI a NOP for userspace emulators

2021-05-10 13:24:09 +01:00

avr

target/avr: Ignore unimplemented WDR opcode

2021-05-13 19:18:42 +02:00

cris

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hexagon

Trivial patches pull request 20210503

2021-05-05 13:52:00 +01:00

hppa

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i386

target/i386: Reduce DisasContext popl_esp_hack and rip_offset to uint8_t

2021-05-19 12:15:47 -05:00

m68k

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microblaze

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mips

target/mips: Set set_default_nan_mode with set_snan_bit_is_one

2021-05-16 07:13:51 -05:00

nios2

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openrisc

Do not include sysemu/sysemu.h if it's not really necessary

2021-05-02 17:24:50 +02:00

ppc

target/ppc: removed VSCR from SPR registration

2021-05-04 13:12:59 +10:00

riscv

target/riscv: Fix the RV64H decode comment

2021-05-11 20:02:07 +10:00

rx

Do not include sysemu/sysemu.h if it's not really necessary

2021-05-02 17:24:50 +02:00

s390x

Do not include exec/address-spaces.h if it's not really necessary

2021-05-02 17:24:51 +02:00

sh4

target/sh4: Return error if CPUClass::get_phys_page_debug() fails

2021-05-13 19:00:50 +02:00

sparc

hw/sparc*: Move cpu_check_irqs() to target/sparc/

2021-05-04 22:45:53 +01:00

tricore

target/tricore: Fix OPC2_32_RRPW_EXTR for width=0

2021-03-14 14:49:01 +01:00

xtensa

Do not include exec/address-spaces.h if it's not really necessary

2021-05-02 17:24:51 +02:00

meson.build

Drop the deprecated unicore32 target

2021-05-12 18:20:52 +02:00