mirror of
https://github.com/xemu-project/xemu.git
synced 2024-11-28 05:50:37 +00:00
90260c6c09
Except for the case of setting the IOTLB entry in TCG mode, we can avoid the subpage dispatching handlers and do the resolution directly on address_space_lookup_region. An IOTLB entry describes a full page, not only the region that the first access to a sub-divided page may return. This patch therefore introduces a special translation function, address_space_translate_for_iotlb, that avoids the subpage resolutions. In contrast, callers of the existing address_space_translate service will now always receive the terminal memory region section. This will be important for breaking the BQL and for enabling unaligned memory region. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
49 lines
1.9 KiB
C
49 lines
1.9 KiB
C
/*
|
|
* Common CPU TLB handling
|
|
*
|
|
* Copyright (c) 2003 Fabrice Bellard
|
|
*
|
|
* This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
* License as published by the Free Software Foundation; either
|
|
* version 2 of the License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
#ifndef CPUTLB_H
|
|
#define CPUTLB_H
|
|
|
|
#if !defined(CONFIG_USER_ONLY)
|
|
/* cputlb.c */
|
|
void tlb_protect_code(ram_addr_t ram_addr);
|
|
void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr,
|
|
target_ulong vaddr);
|
|
void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start,
|
|
uintptr_t length);
|
|
void cpu_tlb_reset_dirty_all(ram_addr_t start1, ram_addr_t length);
|
|
void tlb_set_dirty(CPUArchState *env, target_ulong vaddr);
|
|
extern int tlb_flush_count;
|
|
|
|
/* exec.c */
|
|
void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr);
|
|
|
|
MemoryRegionSection *
|
|
address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
|
|
hwaddr *plen);
|
|
hwaddr memory_region_section_get_iotlb(CPUArchState *env,
|
|
MemoryRegionSection *section,
|
|
target_ulong vaddr,
|
|
hwaddr paddr, hwaddr xlat,
|
|
int prot,
|
|
target_ulong *address);
|
|
bool memory_region_is_unassigned(MemoryRegion *mr);
|
|
|
|
#endif
|
|
#endif
|